linux-kernel - [PATCH 0/2] phy: qcom: qmp-pcie: Add PCIe PHY no

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Message-Id: <20250121094140.4006801-1-quic_wenbyao@quicinc.com>
Date: Tue, 21 Jan 2025 17:41:38 +0800
From: Wenbin Yao <quic_wenbyao@...cinc.com>
To: vkoul@...nel.org, kishon@...nel.org, p.zabel@...gutronix.de,
        dmitry.baryshkov@...aro.org, abel.vesa@...aro.org,
        quic_qianyu@...cinc.com, neil.armstrong@...aro.org,
        manivannan.sadhasivam@...aro.org, quic_devipriy@...cinc.com,
        konrad.dybcio@....qualcomm.com, linux-arm-msm@...r.kernel.org,
        linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: quic_wenbyao@...cinc.com
Subject: [PATCH 0/2] phy: qcom: qmp-pcie: Add PCIe PHY no_csr reset support

The series aims to skip phy register programming and drive PCIe PHY with
register setting programmed in bootloader by simply toggling no_csr reset,
which once togglled, PHY hardware will be reset while PHY registers are
retained.

First, determine whether PHY setting can be skipped by checking
QPHY_START_CTRL register and the existence of nocsr reset. If it is
programmed and no_csr reset is supported, do no_csr reset and skip BCR
reset which will reset entire PHY.

This series also remove has_nocsr_reset flag in qmp_phy_cfg structure and
decide whether the PHY supports nocsr reset by checking the existence of
nocsr reset in device tree.

The series are tested on X1E80100-QCP and HDK8550.

Wenbin Yao (2):
  phy: qcom: pcie: Determine has_nocsr_reset dynamically
  phy: qcom: qmp-pcie: Add PHY register retention support

 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 109 ++++++++++++++---------
 1 file changed, 65 insertions(+), 44 deletions(-)

base-commit: bcf2acd8f64b0a5783deeeb5fd70c6163ec5acd7
-- 
2.34.1