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Message-ID: <dlnfivdhol7faotaqygpvdi2zbgpwrvcruppbkgfleoa6msxib@voe7dhqvfmy6>
Date: Wed, 22 Jan 2025 11:03:22 +0100
From: Uwe Kleine-König <ukleinek@...nel.org>
To: Chen Wang <unicorn_wang@...look.com>
Cc: Chen Wang <unicornxw@...il.com>, robh@...nel.org, krzk+dt@...nel.org, 
	conor+dt@...nel.org, inochiama@...look.com, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-pwm@...r.kernel.org, linux-riscv@...ts.infradead.org, 
	chao.wei@...hgo.com, haijiao.liu@...hgo.com, xiaoguang.xing@...hgo.com, 
	chunzhi.lin@...hgo.com, Sean Young <sean@...s.org>
Subject: Re: [PATCH v6 2/3] pwm: sophgo: add driver for Sophgo SG2042 PWM

Hello,

On Wed, Jan 22, 2025 at 04:58:26PM +0800, Chen Wang wrote:
> On 2025/1/21 19:14, Uwe Kleine-König wrote:
> > On Wed, Dec 04, 2024 at 11:17:18AM +0800, Chen Wang wrote:
> > > +	ret = devm_clk_rate_exclusive_get(dev, clk);
> > > +	if (ret)
> > > +		return dev_err_probe(dev, ret, "failed to get exclusive rate\n");
> > > +
> > > +	ddata->clk_rate_hz = clk_get_rate(clk);
> > > +	if (!ddata->clk_rate_hz || ddata->clk_rate_hz > NSEC_PER_SEC)
> >
> > Please add a comment about why you check for > NSEC_PER_SEC.
> 
> Seems no need to check this (> NSEC_PER_SEC ), I will remove it in next
> version.

The rational is usually that

	mul_u64_u64_div_u64(ddata->clk_rate_hz, state->period, NSEC_PER_SEC)

cannot overflow. Your driver relies on that, too. (Which somewhat
proves that a comment is indeed necessary :-)

Best regards
Uwe

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