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Message-ID: <6c1785c8-e74e-4912-95bb-88b6e94f544f@intel.com>
Date: Thu, 23 Jan 2025 15:06:26 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Peter Zijlstra <peterz@...radead.org>,
Dave Hansen <dave.hansen@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org, x86@...nel.org, tglx@...utronix.de,
bp@...en8.de, joro@...tes.org, luto@...nel.org,
kirill.shutemov@...ux.intel.com, rick.p.edgecombe@...el.com, jgross@...e.com
Subject: Re: [RFC][PATCH 0/8] x86/mm: Simplify PAE page table handling
On 1/23/25 13:49, Peter Zijlstra wrote:
> On Thu, Jan 23, 2025 at 09:24:28AM -0800, Dave Hansen wrote:
>> tl;dr: 32-bit PAE page table handing is a bit different when PTI
>> is on and off. Making the handling uniform removes a good amount
>> of code at the cost of not sharing kernel PMDs. The downside of
>> this simplification is bloating non-PTI PAE kernels by ~2 pages
>> per process.
>>
>> Anyone who cares about security on 32-bit is running with PTI and
>> PAE because PAE has the No-eXecute page table bit. They are already
>> paying the 2-page penalty. Anyone who cares more about memory
>> footprint than security is probably already running a !PAE kernel
>> and will not be affected by this.
>
> The reality is that many of the mitigations we have are 64bit only.
> 32bit is known insecure. There is absolutely no point in using PTI on
> 32bit at all.
>
> Can't we just rip it out?
32-bit+PTI or 32-bit in general? ;)
I'm curious what Joerg and the other folks that worked on 32-bit PTI
think about it in retrospect. The 32 vs. 64-bit security gap was
probably modest in 2018 and it can only have grown since then.
I definitely haven't seen a lot of 32-bit PTI bug reports.
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