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Message-ID: <20250125142436.5e0b8661@jic23-huawei>
Date: Sat, 25 Jan 2025 14:24:36 +0000
From: Jonathan Cameron <jic23@...nel.org>
To: Alisa-Dariana Roman <alisadariana@...il.com>
Cc: Alisa-Dariana Roman <alisa.roman@...log.com>, Jonathan Cameron
<Jonathan.Cameron@...wei.com>, David Lechner <dlechner@...libre.com>,
linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org, Lars-Peter
Clausen <lars@...afoo.de>, Michael Hennerich
<Michael.Hennerich@...log.com>, Rob Herring <robh@...nel.org>, Krzysztof
Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Linus
Walleij <linus.walleij@...aro.org>, Bartosz Golaszewski <brgl@...ev.pl>
Subject: Re: [PATCH v2 1/2] dt-bindings: iio: adc: add AD7191
On Wed, 22 Jan 2025 15:20:39 +0200
Alisa-Dariana Roman <alisadariana@...il.com> wrote:
> AD7191 is a pin-programmable, ultralow noise 24-bit sigma-delta ADC
> designed for precision bridge sensor measurements. It features two
> differential analog input channels, selectable output rates,
> programmable gain, internal temperature sensor and simultaneous
> 50Hz/60Hz rejection.
>
> Signed-off-by: Alisa-Dariana Roman <alisa.roman@...log.com>
> ---
> .../bindings/iio/adc/adi,ad7191.yaml | 175 ++++++++++++++++++
> MAINTAINERS | 7 +
> 2 files changed, 182 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad7191.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7191.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7191.yaml
> new file mode 100644
> index 000000000000..c0a6bed7a9cb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7191.yaml
> @@ -0,0 +1,175 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2025 Analog Devices Inc.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/adi,ad7191.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Analog Devices AD7191 ADC device driver
Not a "device driver" so drop that bit or say 'binding' instead.
> +
> +maintainers:
> + - Alisa-Dariana Roman <alisa.roman@...log.com>
> +
> +description: |
> + Bindings for the Analog Devices AD7191 ADC device. Datasheet can be
> + found here:
> + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7191.pdf
> +
> +properties:
> + compatible:
> + enum:
> + - adi,ad7191
> +
> + reg:
> + maxItems: 1
> +
> + spi-cpol: true
> +
> + spi-cpha: true
> +
> + clocks:
> + maxItems: 1
> + description:
> + Optionally, either a crystal can be attached externally between MCLK1 and
> + MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2
> + pin. If absent, internal 4.92MHz clock is used.
> +
> + interrupts:
> + maxItems: 1
> +
> + avdd-supply:
> + description: AVdd voltage supply
> +
> + dvdd-supply:
> + description: DVdd voltage supply
> +
> + vref-supply:
> + description: Vref voltage supply
> +
> + odr-gpios:
> + description: |
> + ODR1 and ODR2 pins for output data rate selection. Should be defined if
> + adi,odr-state is absent.
> + maxItems: 2
minItems also 2? i guess we aren't coping with situation of one pin wired
until some board designer decides to do that.
> +
> + adi,odr-state:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + Should be present if ODR pins are pin-strapped. Value corresponds to:
> + 0: 120 Hz (ODR1=0, ODR2=0)
> + 1: 60 Hz (ODR1=0, ODR2=1)
> + 2: 50 Hz (ODR1=1, ODR2=0)
> + 3: 10 Hz (ODR1=1, ODR2=1)
> + If defined, odr-gpios must be absent.
> + enum: [0, 1, 2, 3]
> +
> + pga-gpios:
> + description: |
> + PGA1 and PGA2 pins for gain selection. Should be defined if adi,pga-state
> + is absent.
> + maxItems: 2
minItems here as well I think.
> +
Jonathan
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