linux-kernel - Re: [PATCH v3 2/4] dt-bindings: clock: update interconnect cells for ipq5424

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Message-ID: <20250127-amethyst-capybara-from-uranus-5e6bf4@krzk-bin>
Date: Mon, 27 Jan 2025 08:27:06 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
Cc: andersson@...nel.org, mturquette@...libre.com, sboyd@...nel.org, 
	robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, lpieralisi@...nel.org, 
	kw@...ux.com, manivannan.sadhasivam@...aro.org, bhelgaas@...gle.com, 
	konradybcio@...nel.org, linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org, 
	quic_srichara@...cinc.com, quic_varada@...cinc.com
Subject: Re: [PATCH v3 2/4] dt-bindings: clock: update interconnect cells for
 ipq5424

On Sat, Jan 25, 2025 at 09:29:18AM +0530, Manikanta Mylavarapu wrote:
> Interconnect cells differ between the IPQ5332 and IPQ5424.
> Therefore, update the interconnect cells according to the SoC.

Why do they differ? Why they cannot be the same?

> 
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
> ---
>  .../devicetree/bindings/clock/qcom,ipq5332-gcc.yaml       | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
> index 1230183fc0a9..fac7922d2473 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
> @@ -35,8 +35,6 @@ properties:
>        - description: PCIE 2-lane PHY3 pipe clock source
>  
>    '#power-domain-cells': false
> -  '#interconnect-cells':
> -    const: 1

Properties are always defined top-level or in other schema.

Best regards,
Krzysztof