linux-kernel - Re: [PATCH v3 3/4] arm64: dts: qcom: ipq5424: Add PCIe PHYs and controller nodes

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Message-ID: <0e676657-6c9d-4fb5-a0ab-1cfc6ef75039@quicinc.com>
Date: Thu, 30 Jan 2025 12:27:56 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>, <andersson@...nel.org>,
        <mturquette@...libre.com>, <sboyd@...nel.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>, <lpieralisi@...nel.org>,
        <kw@...ux.com>, <manivannan.sadhasivam@...aro.org>,
        <bhelgaas@...gle.com>, <konradybcio@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-pci@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_varada@...cinc.com>
Subject: Re: [PATCH v3 3/4] arm64: dts: qcom: ipq5424: Add PCIe PHYs and
 controller nodes



On 1/28/2025 5:08 PM, Konrad Dybcio wrote:
> On 25.01.2025 4:59 AM, Manikanta Mylavarapu wrote:
>> Add PCIe0, PCIe1, PCIe2, PCIe3 (and corresponding PHY) devices
>> found on IPQ5424 platform. The PCIe0 & PCIe1 are 1-lane Gen3
>> host whereas PCIe2 & PCIe3 are 2-lane Gen3 host.
>>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
>> ---
>> Changes in V3:
>> 	- Replace all instances of ‘0’ with ‘0x0’ wherever applicable in
>> 	  PCIe nodes.
>> 	- Place both compatible entries in a single line for each PCIe
>> 	  controller node.
>> 	- Global interrupt is defined for each PCIe controller node.
>> 	- Remove all clocks except the RCHNG clock from the assigned-clocks.
>> 	- ICC tag is defined for the interconnect path of each pcie controller
>> 	  node.
> 
> This one is wrong, please undo..

Okay, sure.

Thanks & Regards,
Manikanta.