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Message-Id: <20250130130101.1040824-5-alexander.stein@ew.tq-group.com>
Date: Thu, 30 Jan 2025 14:01:01 +0100
From: Alexander Stein <alexander.stein@...tq-group.com>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc: Alexander Stein <alexander.stein@...tq-group.com>,
devicetree@...r.kernel.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 4/4] arm64: dts: imx8mn: Add access-controller references
Mark ocotp as a access-controller and add references on peripherals
which can be disabled (fused).
Signed-off-by: Alexander Stein <alexander.stein@...tq-group.com>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index a5f9cfb46e5dd..b023724679b80 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/nvmem/fsl,imx8mn-ocotp.h>
#include <dt-bindings/thermal/thermal.h>
#include "imx8mn-pinfunc.h"
@@ -431,6 +432,7 @@ easrc: easrc@...c0000 {
firmware-name = "imx/easrc/easrc-imx8mn.bin";
fsl,asrc-rate = <8000>;
fsl,asrc-format = <2>;
+ access-controllers = <&ocotp IMX8MN_OCOTP_ASRC_DISABLE>;
status = "disabled";
};
};
@@ -571,6 +573,7 @@ ocotp: efuse@...50000 {
clocks = <&clk IMX8MN_CLK_OCOTP_ROOT>;
#address-cells = <1>;
#size-cells = <1>;
+ #access-controller-cells = <1>;
/*
* The register address below maps to the MX8M
@@ -1053,6 +1056,7 @@ fec1: ethernet@...e0000 {
nvmem-cells = <&fec_mac_address>;
nvmem-cell-names = "mac-address";
fsl,stop-mode = <&gpr 0x10 3>;
+ access-controllers = <&ocotp IMX8MN_OCOTP_ENET_DISABLE>;
status = "disabled";
};
@@ -1091,6 +1095,7 @@ mipi_dsi: dsi@...10000 {
clock-names = "bus_clk", "sclk_mipi";
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_DSI>;
+ access-controllers = <&ocotp IMX8MN_OCOTP_MIPI_DSI_DISABLE>;
status = "disabled";
ports {
@@ -1195,6 +1200,7 @@ mipi_csi: mipi-csi@...30000 {
<&clk IMX8MN_CLK_DISP_AXI_ROOT>;
clock-names = "pclk", "wrap", "phy", "axi";
power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_CSI>;
+ access-controllers = <&ocotp IMX8MN_OCOTP_MIPI_CSI_DISABLE>;
status = "disabled";
ports {
@@ -1225,6 +1231,7 @@ usbotg1: usb@...40000 {
phys = <&usbphynop1>;
fsl,usbmisc = <&usbmisc1 0>;
power-domains = <&pgc_hsiomix>;
+ access-controllers = <&ocotp IMX8MN_OCOTP_USB_OTG1_DISABLE>;
status = "disabled";
};
@@ -1288,6 +1295,7 @@ gpu: gpu@...00000 {
<400000000>,
<1200000000>;
power-domains = <&pgc_gpumix>;
+ access-controllers = <&ocotp IMX8MN_OCOTP_GPU3D_DISABLE>;
};
gic: interrupt-controller@...00000 {
--
2.34.1
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