linux-kernel - Re: [PATCH v2] arm64: dts: qcom: sm8650: add all 8 coresight ETE nodes

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Message-ID: <fe3424ac-2429-429f-a2a8-34b9a7f06b06@oss.qualcomm.com>
Date: Mon, 3 Feb 2025 15:06:09 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Neil Armstrong <neil.armstrong@...aro.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>,
        Yuanfang Zhang <quic_yuanfang@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH v2] arm64: dts: qcom: sm8650: add all 8 coresight ETE
 nodes

On 29.01.2025 4:08 PM, Neil Armstrong wrote:
> Only CPU0 Embedded Trace Extension (ETE) was added, but there's one
> for all 8 CPUs, so add the missing ones.
> 
> Fixes: 256e6937e48a ("arm64: dts: qcom: sm8650: Add coresight nodes")
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
> Changes in v2:
> - fixed the 7/8 cpu wording
> - added the sm8650 prefix
> - add review tag
> - Link to v1: https://lore.kernel.org/r/20250129-topic-sm8650-upstream-add-all-coresight-cpus-v1-1-96996d37df8e@linaro.org
> ---
>  arch/arm64/boot/dts/qcom/sm8650.dtsi | 163 ++++++++++++++++++++++++++++++++++-
>  1 file changed, 161 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 86684cb9a9325618ddb74458621cf4bbdc1cc0d1..d925d5e2c8182d522dd5b8e1fa0e253f5de2f7a7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -365,7 +365,7 @@ cluster_sleep_1: cluster-sleep-1 {
>  		};
>  	};
>  
> -	ete0 {
> +	ete-0 {
>  		compatible = "arm,embedded-trace-extension";
>  
>  		cpu = <&cpu0>;
> @@ -379,15 +379,174 @@ ete0_out_funnel_ete: endpoint {
>  		};
>  	};
>  
> +	ete-1 {
> +		compatible = "arm,embedded-trace-extension";
> +
> +		cpu = <&cpu1>;
> +
> +		out-ports {
> +			port {
> +				ete1_out_funnel_ete: endpoint {
> +					remote-endpoint = <&funnel_ete_in_ete1>;
> +				};
> +			};
> +		};
> +	};

These bindings are kinda tragic, imagine this on a 128 core chip :/

But alas

Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>

Konrad