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Message-ID: <20250204170100.48263-1-andriy.shevchenko@linux.intel.com> Date: Tue, 4 Feb 2025 19:01:00 +0200 From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com> To: linux-kernel@...r.kernel.org Cc: Mika Westerberg <mika.westerberg@...ux.intel.com>, Andy Shevchenko <andriy.shevchenko@...ux.intel.com> Subject: [PATCH v1 1/1] MAINTAINERS: Add pin control and GPIO to the Intel MID record Intel MID record is not listed all related files. Add to there pin control and GPIO drivers along with HSU (High Speed UART) and HSU DMA. Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com> --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 3520ce6f9859..095459fbe385 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11866,12 +11866,19 @@ S: Supported F: arch/x86/include/asm/intel-mid.h F: arch/x86/pci/intel_mid_pci.c F: arch/x86/platform/intel-mid/ +F: drivers/dma/hsu/ F: drivers/extcon/extcon-intel-mrfld.c +F: drivers/gpio/gpio-merrifield.c +F: drivers/gpio/gpio-tangier.* F: drivers/iio/adc/intel_mrfld_adc.c F: drivers/mfd/intel_soc_pmic_mrfld.c +F: drivers/pinctrl/intel/pinctrl-merrifield.c +F: drivers/pinctrl/intel/pinctrl-moorefield.c +F: drivers/pinctrl/intel/pinctrl-tangier.* F: drivers/platform/x86/intel/mrfld_pwrbtn.c F: drivers/platform/x86/intel_scu_* F: drivers/staging/media/atomisp/ +F: drivers/tty/serial/8250/8250_mid.c F: drivers/watchdog/intel-mid_wdt.c F: include/linux/mfd/intel_soc_pmic_mrfld.h F: include/linux/platform_data/x86/intel-mid_wdt.h -- 2.43.0.rc1.1336.g36b5255a03ac
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