linux-kernel - Re: [PATCH v1 1/1] MAINTAINERS: Add pin control and GPIO to the Intel MID record

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Message-ID: <Z6JQTdXEDWPaupZp@smile.fi.intel.com>
Date: Tue, 4 Feb 2025 19:37:17 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: linux-kernel@...r.kernel.org
Cc: Mika Westerberg <mika.westerberg@...ux.intel.com>
Subject: Re: [PATCH v1 1/1] MAINTAINERS: Add pin control and GPIO to the
 Intel MID record

On Tue, Feb 04, 2025 at 07:01:00PM +0200, Andy Shevchenko wrote:
> Intel MID record is not listed all related files. Add to there
> pin control and GPIO drivers along with HSU (High Speed UART)
> and HSU DMA.

Mika, JFYI, it's supposed to go via Intel pin control tree.


-- 
With Best Regards,
Andy Shevchenko