lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <afde74d0-b4d4-4907-bfd0-59f68861245a@oss.nxp.com>
Date: Tue, 4 Feb 2025 12:12:34 +0200
From: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
To: Chester Lin <chester62515@...il.com>, Matthias Brugger
 <mbrugger@...e.com>, Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
 Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
 Fabio Estevam <festevam@...il.com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: Pengutronix Kernel Team <kernel@...gutronix.de>,
 linux-arm-kernel@...ts.infradead.org, imx@...ts.linux.dev,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 NXP S32 Linux <s32@....com>, Christophe Lizzi <clizzi@...hat.com>,
 Alberto Ruiz <aruizrui@...hat.com>, Enric Balletbo <eballetb@...hat.com>
Subject: Re: [PATCH v5 0/3] add I2C DTS support for S32G2/S32G3 SoCs

On 1/13/2025 1:05 PM, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
> 
> This patchset aims to add two changes to the S32G2/S32G3 dtsi support:
> - Adding I2C dts support for S32G SoC based boards
> - Centralize the common part of 'S32G-EVB' and 'S32G-RDB' board revisions
> into dtsi files. This refactor will serve I2C in this patchset, but in the
> future it will also be used for other modules such as : FlexCAN and DSPI.
> 
> Changes in V5:
> - Updated several commit titles and descriptions.
> - Moved 'reg' dtsi node entry after 'compatible'.
> - Squashed commit 3/4.
> - Changed 'ina231' dtsi node name to 'current-sensor'.
> 
> Changes in V4:
> - Moved I2C nodes '#address-size' and '#address-cells' entries from board
> common level to S32G2/S32G3 SoC level.
> 
> Changes in V3:
> - Separated patchset into multiple stages: common 'I2C' dts entries, board
> 'I2C' dts entries and the introduction of common 'S32GXXXA-EVB/RDB' dtsi.
> - Added missing changelog for V2 of this patchset
> 
> Changes in V2:
> - Moved I2C end device '#address-size' and '#address-cells' entries from
> board dts to common 's32gxxxa-evb/rdb' common dtsi.
> 
> Ciprian Marian Costea (3):
>    arm64: dts: s32g: add I2C[0..2] support for s32g2 and s32g3
>    arm64: dts: s32g: add common 'S32G-EVB' and 'S32G-RDB' board support
>    arm64: dts: s32g399a-rdb3: Add INA231 sensor entry over I2C4
> 
>   arch/arm64/boot/dts/freescale/s32g2.dtsi      |  55 +++++++
>   .../arm64/boot/dts/freescale/s32g274a-evb.dts |   1 +
>   .../boot/dts/freescale/s32g274a-rdb2.dts      |   1 +
>   arch/arm64/boot/dts/freescale/s32g3.dtsi      |  60 +++++++
>   .../boot/dts/freescale/s32g399a-rdb3.dts      |   9 ++
>   .../boot/dts/freescale/s32gxxxa-evb.dtsi      | 150 ++++++++++++++++++
>   .../boot/dts/freescale/s32gxxxa-rdb.dtsi      | 122 ++++++++++++++
>   7 files changed, 398 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
>   create mode 100644 arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
> 

Hello,

Is there any more feedback on this patchset ? I see that it is hanging 
for a while. Just want to check.

Best Regards,
Ciprian

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ