linux-kernel - Re: [PATCH v2 1/3] mtd: rawnand: cadence: support deferred prob when DMA is not ready

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <87frkt96nw.fsf@bootlin.com>
Date: Tue, 04 Feb 2025 14:32:51 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: "Rabara, Niravkumar L" <niravkumar.l.rabara@...el.com>
Cc: Richard Weinberger <richard@....at>,  Vignesh Raghavendra
 <vigneshr@...com>,  "linux@...blig.org" <linux@...blig.org>,  Shen Lichuan
 <shenlichuan@...o.com>,  Jinjie Ruan <ruanjinjie@...wei.com>,
  "u.kleine-koenig@...libre.com" <u.kleine-koenig@...libre.com>,
  "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
  "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
  "stable@...r.kernel.org" <stable@...r.kernel.org>
Subject: Re: [PATCH v2 1/3] mtd: rawnand: cadence: support deferred prob
 when DMA is not ready

On 04/02/2025 at 10:43:20 GMT, "Rabara, Niravkumar L" <niravkumar.l.rabara@...el.com> wrote:

> Hi Miquel,
>
>> -----Original Message-----
>> From: Miquel Raynal <miquel.raynal@...tlin.com>
>> Sent: Tuesday, 4 February, 2025 5:20 PM
>> To: Rabara, Niravkumar L <niravkumar.l.rabara@...el.com>
>> Cc: Richard Weinberger <richard@....at>; Vignesh Raghavendra
>> <vigneshr@...com>; linux@...blig.org; Shen Lichuan <shenlichuan@...o.com>;
>> Jinjie Ruan <ruanjinjie@...wei.com>; u.kleine-koenig@...libre.com; linux-
>> mtd@...ts.infradead.org; linux-kernel@...r.kernel.org; stable@...r.kernel.org
>> Subject: Re: [PATCH v2 1/3] mtd: rawnand: cadence: support deferred prob when
>> DMA is not ready
>> 
>> Hello,
>> 
>> > My apologies for the confusion.
>> > Slave DMA terminology used in cadence nand controller bindings and
>> > driver is indeed confusing.
>> >
>> > To answer your question it is,
>> > 1 - External DMA (Generic DMA controller).
>> >
>> > Nand controller IP do not have embedded DMA controller (2 - peripheral
>> DMA).
>> >
>> > FYR, how external DMA is used.
>> > https://elixir.bootlin.com/linux/v6.13.1/source/drivers/mtd/nand/raw/c
>> > adence-nand-controller.c#L1962
>> 
>> In this case we should have a dmas property (and perhaps dma-names), no?
>> 
> No, I believe.
> Cadence NAND controller IP do not have dedicated handshake interface to connect
> with DMA controller.
> My understanding is dmas (and dma-names) are only used for the dedicated handshake
> interface between peripheral and the DMA controller.

I don't see well how you can defer if there is no resource to grab. And
if there is a resource to grab, why is it not described anywhere?

Thanks,
Miquèl