linux-kernel - Re: [PATCH 0/4] net: dsa: b53: Enable internal GPHY on BCM63268

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Message-ID: <9bd9c1e4-2401-46bd-937f-996e97d750c5@lunn.ch>
Date: Thu, 6 Feb 2025 21:17:11 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Florian Fainelli <florian.fainelli@...adcom.com>
Cc: Kyle Hendry <kylehendrydev@...il.com>,
	Vladimir Oltean <olteanv@...il.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/4] net: dsa: b53: Enable internal GPHY on BCM63268

On Thu, Feb 06, 2025 at 10:15:50AM -0800, Florian Fainelli wrote:
> Hi Kyle,
> 
> On 2/5/25 20:30, Kyle Hendry wrote:
> > Some BCM63268 bootloaders do not enable the internal PHYs by default.
> > This patch series adds functionality for the switch driver to
> > configure the gigabit ethernet PHY.
> > 
> > Signed-off-by: Kyle Hendry <kylehendrydev@...il.com>
> 
> So the register address you are manipulating logically belongs in the GPIO
> block (GPIO_GPHY_CTRL) which has become quite a bit of a sundry here. I
> don't have a strong objection about the approach picked up here but we will
> need a Device Tree binding update describing the second (and optional)
> register range.

Despite this being internal, is this actually a GPIO? Should it be
modelled as a GPIO line connected to a reset input on the PHY? It
would then nicely fit in the existing phylib handling of a PHY with a
GPIO reset line?

	Andrew