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Message-ID: <16417b83-af65-4ed2-9b9a-c82363abdd4a@linux.intel.com>
Date: Thu, 6 Feb 2025 17:35:28 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Ingo Molnar <mingo@...hat.com>, Arnaldo Carvalho de Melo
 <acme@...nel.org>, Namhyung Kim <namhyung@...nel.org>,
 Ian Rogers <irogers@...gle.com>, Adrian Hunter <adrian.hunter@...el.com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Kan Liang <kan.liang@...ux.intel.com>, Andi Kleen <ak@...ux.intel.com>,
 Eranian Stephane <eranian@...gle.com>, linux-kernel@...r.kernel.org,
 linux-perf-users@...r.kernel.org, Dapeng Mi <dapeng1.mi@...el.com>
Subject: Re: [PATCH 01/20] perf/x86/intel: Add PMU support for Clearwater
 Forest


On 2/6/2025 3:53 PM, Peter Zijlstra wrote:
> On Thu, Feb 06, 2025 at 09:31:46AM +0800, Mi, Dapeng wrote:
>> On 1/28/2025 12:26 AM, Peter Zijlstra wrote:
>>> On Thu, Jan 23, 2025 at 02:07:02PM +0000, Dapeng Mi wrote:
>>>> From PMU's perspective, Clearwater Forest is similar to the previous
>>>> generation Sierra Forest.
>>>>
>>>> The key differences are the ARCH PEBS feature and the new added 3 fixed
>>>> counters for topdown L1 metrics events.
>>>>
>>>> The ARCH PEBS is supported in the following patches. This patch provides
>>>> support for basic perfmon features and 3 new added fixed counters.
>>>>
>>>> Signed-off-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>
>>>> ---
>>>>  arch/x86/events/intel/core.c | 24 ++++++++++++++++++++++++
>>>>  1 file changed, 24 insertions(+)
>>>>
>>>> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
>>>> index b140c1473a9d..5e8521a54474 100644
>>>> --- a/arch/x86/events/intel/core.c
>>>> +++ b/arch/x86/events/intel/core.c
>>>> @@ -2220,6 +2220,18 @@ static struct extra_reg intel_cmt_extra_regs[] __read_mostly = {
>>>>  	EVENT_EXTRA_END
>>>>  };
>>>>  
>>>> +EVENT_ATTR_STR(topdown-fe-bound,       td_fe_bound_skt,        "event=0x9c,umask=0x01");
>>>> +EVENT_ATTR_STR(topdown-retiring,       td_retiring_skt,        "event=0xc2,umask=0x02");
>>>> +EVENT_ATTR_STR(topdown-be-bound,       td_be_bound_skt,        "event=0xa4,umask=0x02");
>>>> +
>>>> +static struct attribute *skt_events_attrs[] = {
>>>> +	EVENT_PTR(td_fe_bound_skt),
>>>> +	EVENT_PTR(td_retiring_skt),
>>>> +	EVENT_PTR(td_bad_spec_cmt),
>>>> +	EVENT_PTR(td_be_bound_skt),
>>>> +	NULL,
>>>> +};
>>> The skt here is skymont, which is what Sierra Forest was based on, and
>>> you just said that these counters are new with Darkmont, and as such the
>>> lot should be called: dmt or whatever the proper trigraph is.
>> Sorry for late response since the Chinese new year holiday.
>>
>> Sierra Forest is based on Crestmont instead of Skymont. 
> I hate all these names :-( But yeah, you're right.
>
>> The 3 new fixed counters are introduced from Skymont and Darkmont
>> inherits them. So these attributes are named with "skt" suffix.
> Fair enough.
>
> But how come this is new for darkmont and wasn't done for
> arrowlake/lunarlake which have skymont based e-cores?

ARL/LNL are all hybrid platforms, all the event attributes are defined with
a kind of P-core and E-core mixed format like below.

EVENT_ATTR_STR_HYBRID(topdown-retiring,      td_retiring_lnl, 
"event=0xc2,umask=0x02;event=0x00,umask=0x80", hybrid_big_small);
EVENT_ATTR_STR_HYBRID(topdown-fe-bound,      td_fe_bound_lnl, 
"event=0x9c,umask=0x01;event=0x00,umask=0x82", hybrid_big_small);
EVENT_ATTR_STR_HYBRID(topdown-be-bound,      td_be_bound_lnl, 
"event=0xa4,umask=0x02;event=0x00,umask=0x83", hybrid_big_small);

static struct attribute *lnl_hybrid_events_attrs[] = {
    EVENT_PTR(slots_adl),
    EVENT_PTR(td_retiring_lnl),
    EVENT_PTR(td_bad_spec_adl),
    EVENT_PTR(td_fe_bound_lnl),
    EVENT_PTR(td_be_bound_lnl),
    EVENT_PTR(td_heavy_ops_adl),
    EVENT_PTR(td_br_mis_adl),
    EVENT_PTR(td_fetch_lat_adl),
    EVENT_PTR(td_mem_bound_adl),
    NULL
};

CWF is pure E-cores and can't directly use this existed attributes, so
define these new attributes.



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