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Message-ID: <CAAhV-H4o7WS6J-eU=3VR16iVscrr5znpa67Do96cxmd6A0JS0g@mail.gmail.com>
Date: Sun, 9 Feb 2025 17:47:38 +0800
From: Huacai Chen <chenhuacai@...nel.org>
To: Bibo Mao <maobibo@...ngson.cn>
Cc: Tianrui Zhao <zhaotianrui@...ngson.cn>, WANG Xuerui <kernel@...0n.name>, kvm@...r.kernel.org,
loongarch@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] LoongArch: KVM: Set host with kernel mode when switch
to VM mode
Hi, Bibo,
On Fri, Feb 7, 2025 at 11:26 AM Bibo Mao <maobibo@...ngson.cn> wrote:
>
> PRMD and ERA register is only meaningful on the beginning stage
> of exception entry, and it can be overwritten for nested irq or
> exception.
The code doesn't touch ERA, so ERA in the commit message is a typo?
Huacai
>
> When CPU runs in VM mode, interrupt need be enabled on host. And the
> mode for host had better be kernel mode rather than random.
>
> Signed-off-by: Bibo Mao <maobibo@...ngson.cn>
> ---
> arch/loongarch/kvm/switch.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/loongarch/kvm/switch.S b/arch/loongarch/kvm/switch.S
> index 0c292f818492..1be185e94807 100644
> --- a/arch/loongarch/kvm/switch.S
> +++ b/arch/loongarch/kvm/switch.S
> @@ -85,7 +85,7 @@
> * Guest CRMD comes from separate GCSR_CRMD register
> */
> ori t0, zero, CSR_PRMD_PIE
> - csrxchg t0, t0, LOONGARCH_CSR_PRMD
> + csrwr t0, LOONGARCH_CSR_PRMD
>
> /* Set PVM bit to setup ertn to guest context */
> ori t0, zero, CSR_GSTAT_PVM
> --
> 2.39.3
>
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