| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20250210164506.495747-3-ada@thorsis.com>
Date: Mon, 10 Feb 2025 17:44:52 +0100
From: Alexander Dahl <ada@...rsis.com>
To: Claudiu Beznea <claudiu.beznea@...on.dev>
Cc: Nicolas Ferre <nicolas.ferre@...rochip.com>,
Ryan Wanner <ryan.wanner@...rochip.com>,
linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org,
linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Subject: [PATCH v2 02/16] ARM: dts: microchip: Use new PMC bindings
The bindings were split up per SoC before adding new members for
missing clocks.
Signed-off-by: Alexander Dahl <ada@...rsis.com>
---
Notes:
v2:
- new patch, not present in v1
arch/arm/boot/dts/microchip/sam9x60.dtsi | 15 ++++++++-------
arch/arm/boot/dts/microchip/sam9x7.dtsi | 11 ++++++-----
arch/arm/boot/dts/microchip/sama7d65.dtsi | 5 +++--
arch/arm/boot/dts/microchip/sama7g5.dtsi | 23 ++++++++++++-----------
4 files changed, 29 insertions(+), 25 deletions(-)
diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi
index b8b2c1ddf3f1e..1724b79967a17 100644
--- a/arch/arm/boot/dts/microchip/sam9x60.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sam9x60-pmc.h>
#include <dt-bindings/mfd/at91-usart.h>
#include <dt-bindings/mfd/atmel-flexcom.h>
@@ -81,9 +82,9 @@ usb0: gadget@...000 {
reg = <0x00500000 0x100000
0xf803c000 0x400>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_CORE SAM9X60_PMC_UTMI>;
clock-names = "pclk", "hclk";
- assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+ assigned-clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_UTMI>;
assigned-clock-rates = <480000000>;
status = "disabled";
};
@@ -101,9 +102,9 @@ usb2: ehci@...000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00700000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
- clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
+ clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
clock-names = "usb_clk", "ehci_clk";
- assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
+ assigned-clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_UTMI>;
assigned-clock-rates = <480000000>;
status = "disabled";
};
@@ -121,7 +122,7 @@ ebi: ebi@...00000 {
0x3 0x0 0x40000000 0x10000000
0x4 0x0 0x50000000 0x10000000
0x5 0x0 0x60000000 0x10000000>;
- clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+ clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_MCK>;
status = "disabled";
nand_controller: nand-controller {
@@ -1063,7 +1064,7 @@ hlcdc: hlcdc@...38000 {
clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_GCK 25>, <&clk32k 1>;
clock-names = "periph_clk","sys_clk", "slow_clk";
assigned-clocks = <&pmc PMC_TYPE_GCK 25>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_MCK>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAM9X60_PMC_MCK>;
status = "disabled";
hlcdc-display-controller {
@@ -1369,7 +1370,7 @@ pit: timer@...ffe40 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffe40 0x10>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
- clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
+ clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_MCK>;
};
clk32k: clock-controller@...ffe50 {
diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/microchip/sam9x7.dtsi
index b217a908f5253..458cfb81f8bcf 100644
--- a/arch/arm/boot/dts/microchip/sam9x7.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi
@@ -8,6 +8,7 @@
*/
#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sam9x7-pmc.h>
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -477,9 +478,9 @@ can0: can@...00000 {
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_GCK 29>;
clock-names = "hclk", "cclk";
- assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 29>;
+ assigned-clocks = <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>, <&pmc PMC_TYPE_GCK 29>;
assigned-clock-rates = <480000000>, <40000000>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>, <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>;
bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
status = "disabled";
};
@@ -493,9 +494,9 @@ can1: can@...04000 {
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, <&pmc PMC_TYPE_GCK 30>;
clock-names = "hclk", "cclk";
- assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
+ assigned-clocks = <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>, <&pmc PMC_TYPE_GCK 30>;
assigned-clock-rates = <480000000>, <40000000>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>, <&pmc PMC_TYPE_CORE SAM9X7_PMC_UTMI>;
bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
status = "disabled";
};
@@ -1100,7 +1101,7 @@ pmecc: ecc-engine@...fe000 {
mpddrc: mpddrc@...fe800 {
compatible = "microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc";
reg = <0xffffe800 0x200>;
- clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE PMC_MCK>;
+ clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE SAM9X7_PMC_MCK>;
clock-names = "ddrck", "mpddr";
};
diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index 854b30d15dcd4..111a6a6ef0e00 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -9,6 +9,7 @@
*/
#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sama7d65-pmc.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
@@ -29,7 +30,7 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a7";
reg = <0x0>;
device_type = "cpu";
- clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
+ clocks = <&pmc PMC_TYPE_CORE SAMA7D65_PMC_CPUPLL>;
clock-names = "cpu";
};
};
@@ -91,7 +92,7 @@ sdmmc1: mmc@...08000 {
clock-names = "hclock", "multclk";
assigned-clocks = <&pmc PMC_TYPE_GCK 76>;
assigned-clock-rates = <200000000>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_MCK1>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7D65_PMC_MCK1>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi
index 17bcdcf0cf4a0..f68c2eb8edd54 100644
--- a/arch/arm/boot/dts/microchip/sama7g5.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7g5.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/at91.h>
+#include <dt-bindings/clock/microchip,sama7g5-pmc.h>
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/mfd/at91-usart.h>
@@ -34,7 +35,7 @@ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x0>;
- clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
+ clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_CPUPLL>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>; /* min followed by max */
@@ -189,7 +190,7 @@ ebi: ebi@...00000 {
0x1 0x0 0x48000000 0x8000000
0x2 0x0 0x50000000 0x8000000
0x3 0x0 0x58000000 0x8000000>;
- clocks = <&pmc PMC_TYPE_CORE PMC_MCK1>;
+ clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_MCK1>;
status = "disabled";
nand_controller: nand-controller {
@@ -372,7 +373,7 @@ can0: can@...28000 {
clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>;
clock-names = "hclk", "cclk";
assigned-clocks = <&pmc PMC_TYPE_GCK 61>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
assigned-clock-rates = <40000000>;
bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
status = "disabled";
@@ -388,7 +389,7 @@ can1: can@...2c000 {
clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>;
clock-names = "hclk", "cclk";
assigned-clocks = <&pmc PMC_TYPE_GCK 62>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
assigned-clock-rates = <40000000>;
bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
status = "disabled";
@@ -404,7 +405,7 @@ can2: can@...30000 {
clocks = <&pmc PMC_TYPE_PERIPHERAL 63>, <&pmc PMC_TYPE_GCK 63>;
clock-names = "hclk", "cclk";
assigned-clocks = <&pmc PMC_TYPE_GCK 63>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
assigned-clock-rates = <40000000>;
bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>;
status = "disabled";
@@ -420,7 +421,7 @@ can3: can@...34000 {
clocks = <&pmc PMC_TYPE_PERIPHERAL 64>, <&pmc PMC_TYPE_GCK 64>;
clock-names = "hclk", "cclk";
assigned-clocks = <&pmc PMC_TYPE_GCK 64>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
assigned-clock-rates = <40000000>;
bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
status = "disabled";
@@ -436,7 +437,7 @@ can4: can@...38000 {
clocks = <&pmc PMC_TYPE_PERIPHERAL 65>, <&pmc PMC_TYPE_GCK 65>;
clock-names = "hclk", "cclk";
assigned-clocks = <&pmc PMC_TYPE_GCK 65>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
assigned-clock-rates = <40000000>;
bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>;
status = "disabled";
@@ -452,7 +453,7 @@ can5: can@...3c000 {
clocks = <&pmc PMC_TYPE_PERIPHERAL 66>, <&pmc PMC_TYPE_GCK 66>;
clock-names = "hclk", "cclk";
assigned-clocks = <&pmc PMC_TYPE_GCK 66>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
assigned-clock-rates = <40000000>;
bosch,mram-cfg = <0x8800 0 0 64 0 0 32 32>;
status = "disabled";
@@ -483,7 +484,7 @@ sdmmc0: mmc@...04000 {
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>;
clock-names = "hclock", "multclk";
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
assigned-clock-rates = <200000000>;
microchip,sdcal-inverted;
@@ -496,7 +497,7 @@ sdmmc1: mmc@...08000 {
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>;
clock-names = "hclock", "multclk";
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
assigned-clock-rates = <200000000>;
microchip,sdcal-inverted;
@@ -509,7 +510,7 @@ sdmmc2: mmc@...0c000 {
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 82>, <&pmc PMC_TYPE_GCK 82>;
clock-names = "hclock", "multclk";
- assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_SYSPLL>;
assigned-clocks = <&pmc PMC_TYPE_GCK 82>;
assigned-clock-rates = <200000000>;
microchip,sdcal-inverted;
--
2.39.5
Powered by blists - more mailing lists