linux-kernel - Re: (subset) [PATCH v2 0/6] X1P42100 DT and PCIe PHY bits

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Message-Id: <173920807069.103786.582122226183842202.b4-ty@kernel.org>
Date: Mon, 10 Feb 2025 22:51:10 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Kishon Vijay Abraham I <kishon@...nel.org>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>, 
 Konrad Dybcio <konradybcio@...nel.org>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>, 
 linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 Konrad Dybcio <konrad.dybcio@....qualcomm.com>, 
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, 
 Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, 
 Jens Glathe <jens.glathe@...schoolsolutions.biz>
Subject: Re: (subset) [PATCH v2 0/6] X1P42100 DT and PCIe PHY bits


On Mon, 03 Feb 2025 15:43:19 +0100, Konrad Dybcio wrote:
> X1P42100 is a(n indirect) derivative of X1E80100 - the silicon is
> actually different and it's not a fused down part.
> 
> Introduce the DTS bits required to support it by mostly reusing the
> X1E SoC and CRD DTSIs. The most notable differences from our software
> PoV are a different GPU (support for which will be added later), 4
> less CPUs and some nuances in the PCIe hardware.
> 
> [...]

Applied, thanks!

[1/6] dt-bindings: phy: qcom,qmp-pcie: Add X1P42100 PCIe Gen4x4 PHY
      commit: 2e1ffd4c180591e6a46c7f94a6bb187a0661141e
[2/6] dt-bindings: phy: qcom,qmp-pcie: Drop reset number constraints
      commit: f67f8c61b7fd3f72cf716b3845211e69265d13bd
[3/6] phy: qcom: qmp-pcie: Add X1P42100 Gen4x4 PHY
      commit: 0d8db251dd15d2e284f5a6a53bc2b869f3eca711

Best regards,
-- 
~Vinod