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Message-ID: <20250210-placid-energetic-jaguar-d523d2@krzk-bin>
Date: Mon, 10 Feb 2025 11:11:38 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
Cc: Georgi Djakov <djakov@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>,
Odelu Kukatla <quic_okukatla@...cinc.com>, Mike Tipton <quic_mdtipton@...cinc.com>,
Jeff Johnson <quic_jjohnson@...cinc.com>, Andrew Halaney <ahalaney@...hat.com>,
Sibi Sankar <quic_sibis@...cinc.com>, linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V8 1/7] dt-bindings: interconnect: Add EPSS L3 compatible
for SA8775P
On Wed, Feb 05, 2025 at 06:27:37PM +0000, Raviteja Laggyshetty wrote:
> Add Epoch Subsystem (EPSS) L3 interconnect provider binding on
> SA8775P SoCs.
> The L3 instance on the SA8775P SoC is similar to those on SoCs
> like SM8250 and SC7280. These SoCs use the PERF register instead
> of L3_REG for programming the performance level, which is managed
> in the data associated with the target-specific compatibles.
> Since the hardware remains the same across all EPSS-supporting SoCs,
> the generic compatible is retained for all SoCs.
>
> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
> ---
> Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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