linux-kernel - Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <88ba8736-52b8-470c-ba5d-56c1cc5f5b8b@zytor.com>
Date: Mon, 10 Feb 2025 18:25:01 -0800
From: Xin Li <xin@...or.com>
To: linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org
Cc: tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
        dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
        will@...nel.org, peterz@...radead.org, yury.norov@...il.com,
        akpm@...ux-foundation.org, acme@...nel.org, namhyung@...nel.org,
        brgerst@...il.com, andrew.cooper3@...rix.com, nik.borisov@...e.com
Subject: Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required
 and disabled feature masks

On 1/5/2025 11:07 PM, Xin Li (Intel) wrote:
> The x86 build process first generates required and disabled feature
> masks based on current build config, and then uses these generated
> masks to compile the source code.  When a CPU feature is not enabled
> in a build config, e.g., when CONFIG_X86_FRED=n, its feature disable
> flag, i.e., DISABLE_FRED, needs to be properly defined and added to
> a specific disabled CPU features mask in <asm/disabled-features.h>,
> as the following patch does:
> https://lore.kernel.org/all/20231205105030.8698-8-xin3.li@intel.com/.
> As a result, the FRED feature bit is surely cleared in the generated
> kernel binary when CONFIG_X86_FRED=n.
> 
> Recently there is another case to repeat the same exercise for the
> AMD SEV-SNP CPU feature:
> https://lore.kernel.org/all/20240126041126.1927228-2-michael.roth@amd.com/.
> https://lore.kernel.org/all/20240126041126.1927228-23-michael.roth@amd.com/.
> 
> It was one thing when there were four of CPU feature masks, but with
> over 20 it is going to cause mistakes, e.g.,
> https://lore.kernel.org/lkml/aaed79d5-d683-d1bc-7ba1-b33c8d6db618@suse.com/.
> 
> We want to eliminate the stupidly repeated exercise to manually assign
> features to CPU feature words through introducing an AWK script to
> automatically generate a header with required and disabled CPU feature
> masks based on current build config, and this patch set does that.
> 
> Recently when working on the immediate form of MSR access instructions,
> I needed to add a new CPU feature word for CPUID.7.1.ECX, and I had to
> replace the same check "(NCAPINTS != 22)" with (NCAPINTS != 23) in 3
> different files as
> https://github.com/xinli-intel/linux-fred-public/commit/aa80536927fcd293be8ae54e1d5e4d886cf83f21
> Obviously these replacements could be saved if the patch to add a new
> CPU feature word is reworked on top of this patch set.
> 
> So this seems a good opportunity to demonstrate the convenience out of
> this patch set, and here comes v5 with just one more patch on top of v4
> that adds a new CPU feature word for CPUID.7.1.ECX and uses it for the
> immediate form of MSR access feature.
> 
> Link to v4:
> https://lore.kernel.org/lkml/20240628174544.3118826-1-xin@zytor.com/

The patch proposed in the following review reminds me this infra
improvement patch set again, so a gentle ping :)

https://lore.kernel.org/lkml/CA+i-1C3LDJTf26WdBo7MvCdTs-dybqsUp3Ze7NowcOUHPWMXrg@mail.gmail.com/

Thanks!
     Xin