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Message-ID: <cf78b342-6655-4cde-b877-8f498ed0e6bf@quicinc.com>
Date: Tue, 11 Feb 2025 14:14:53 +0530
From: Pratyush Brahma <quic_pbrahma@...cinc.com>
To: Ling Xu <quic_lxu5@...cinc.com>, <andersson@...nel.org>,
<konradybcio@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>
CC: <quic_kuiw@...cinc.com>, <quic_ekangupt@...cinc.com>,
<quic_kartsana@...cinc.com>, <kernel@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <stable@...nel.org>
Subject: Re: [PATCH v3 2/2] arm64: dts: qcom: sa8775p: Remove cdsp
compute-cb@10
On 2/11/2025 1:44 PM, Ling Xu wrote:
> From: Karthik Sanagavarapu <quic_kartsana@...cinc.com>
>
> Remove the context bank compute-cb@10 because these SMMU ids are S2-only
> which is not used for S1 transaction.
>
> Fixes: f7b01bfb4b47 ("arm64: qcom: sa8775p: Add ADSP and CDSP0 fastrpc nodes")
> Cc: stable@...nel.org
> Signed-off-by: Karthik Sanagavarapu <quic_kartsana@...cinc.com>
> Signed-off-by: Ling Xu <quic_lxu5@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 8 --------
> 1 file changed, 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 0aa27db21f3d..81b2fba94841 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -4585,14 +4585,6 @@ compute-cb@9 {
> dma-coherent;
> };
>
> - compute-cb@10 {
> - compatible = "qcom,fastrpc-compute-cb";
> - reg = <10>;
> - iommus = <&apps_smmu 0x214a 0x04a0>,
> - <&apps_smmu 0x218a 0x0400>;
Commit description seems misleading as these are nested sids and not
S2-only. You may say you don't need it for your
usecase which is a different thing altogether.
> - dma-coherent;
> - };
> -
> compute-cb@11 {
> compatible = "qcom,fastrpc-compute-cb";
> reg = <11>;
--
Thanks and Regards
Pratyush Brahma
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