lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20250212100131.2668403-1-niravkumar.l.rabara@intel.com>
Date: Wed, 12 Feb 2025 18:01:31 +0800
From: niravkumar.l.rabara@...el.com
To: Dinh Nguyen <dinguyen@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	niravkumar.l.rabara@...el.com,
	nirav.rabara@...era.com,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Cc: stable@...r.kernel.org
Subject: [PATCH] arm64: dts: socfpga: agilex5: fix gpio0 address

From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>

Fix gpio0 controller address for Agilex5.

Fixes: 3f7c869e143a ("arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id")
Cc: stable@...r.kernel.org
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 51c6e19e40b8..9e4ef24c8318 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -222,7 +222,7 @@ i3c1: i3c@...a1000 {
 			status = "disabled";
 		};
 
-		gpio0: gpio@...03200 {
+		gpio0: gpio@...03200 {
 			compatible = "snps,dw-apb-gpio";
 			reg = <0xffc03200 0x100>;
 			#address-cells = <1>;
-- 
2.25.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ