linux-kernel - Re: [PATCH] irqchip/qcom-pdc: Workaround hardware register bug on X1E80100

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Message-ID: <dvo4loo63prbrjm57vu5dcre3eo3onuni7fzucobcbjdhr5wmt@mbgm2kxi6osa>
Date: Fri, 14 Feb 2025 00:14:38 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Stephan Gerhold <stephan.gerhold@...aro.org>
Cc: Thomas Gleixner <tglx@...utronix.de>, 
	Bjorn Andersson <andersson@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>, 
	Rajendra Nayak <quic_rjendra@...cinc.com>, Maulik Shah <quic_mkshah@...cinc.com>, 
	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>, Abel Vesa <abel.vesa@...aro.org>, 
	Johan Hovold <johan.hovold@...aro.org>, linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] irqchip/qcom-pdc: Workaround hardware register bug on
 X1E80100

On Thu, Feb 13, 2025 at 06:04:00PM +0100, Stephan Gerhold wrote:
> On X1E80100, there is a hardware bug in the register logic of the
> IRQ_ENABLE_BANK register. While read accesses work on the normal address,
> all write accesses must be made to a shifted address. Without a workaround
> for this, the wrong interrupt gets enabled in the PDC and it is impossible
> to wakeup from deep suspend (CX collapse).
> 
> This has not caused problems so far, because the deep suspend state was not
> enabled. We need a workaround now since work is ongoing to fix this.
> 
> Introduce a workaround for the problem by matching the qcom,x1e80100-pdc
> compatible and shift the write address by the necessary offset.
> 
> Signed-off-by: Stephan Gerhold <stephan.gerhold@...aro.org>
> ---
>  drivers/irqchip/qcom-pdc.c | 51 +++++++++++++++++++++++++++++++++++++++++++---
>  1 file changed, 48 insertions(+), 3 deletions(-)
> 
> @@ -324,10 +357,21 @@ static int qcom_pdc_init(struct device_node *node, struct device_node *parent)
>  	if (res_size > resource_size(&res))
>  		pr_warn("%pOF: invalid reg size, please fix DT\n", node);
>  
> +	if (of_device_is_compatible(node, "qcom,x1e80100-pdc")) {
> +		pdc_drv1 = ioremap(res.start - PDC_DRV_OFFSET, IRQ_ENABLE_BANK_MAX);

Please mention it in the commit message that you are mapping the memory
outside of the defined device's region.

> +		if (!pdc_drv1) {
> +			pr_err("%pOF: unable to map PDC DRV1 region\n", node);
> +			return -ENXIO;
> +		}
> +
> +		pdc_x1e_quirk = true;
> +	}
> +
>  	pdc_base = ioremap(res.start, res_size);
>  	if (!pdc_base) {
>  		pr_err("%pOF: unable to map PDC registers\n", node);
> -		return -ENXIO;
> +		ret = -ENXIO;
> +		goto fail;
>  	}
>  
>  	pdc_version = pdc_reg_read(PDC_VERSION_REG, 0);
> @@ -363,6 +407,7 @@ static int qcom_pdc_init(struct device_node *node, struct device_node *parent)
>  fail:
>  	kfree(pdc_region);
>  	iounmap(pdc_base);
> +	iounmap(pdc_drv1);
>  	return ret;
>  }
>  
> 
> ---
> base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
> change-id: 20250211-x1e80100-pdc-hw-wa-b738d99ef459
> 
> Best regards,
> -- 
> Stephan Gerhold <stephan.gerhold@...aro.org>
> 

-- 
With best wishes
Dmitry