linux-kernel - Re: [PATCH 1/4] dt-bindings: reset: add generic bit reset controller

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Message-ID: <de7dedf98e2085c895a93ba56c4e5fa50e298d05.camel@pengutronix.de>
Date: Thu, 13 Feb 2025 11:08:59 +0100
From: Philipp Zabel <p.zabel@...gutronix.de>
To: Inochi Amaoto <inochiama@...il.com>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Chen Wang <unicorn_wang@...look.com>, Paul Walmsley
 <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, Albert Ou
 <aou@...s.berkeley.edu>, Guo Ren <guoren@...nel.org>,  Uwe
 Kleine-König <u.kleine-koenig@...libre.com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	sophgo@...ts.linux.dev, linux-riscv@...ts.infradead.org, Yixun Lan
	 <dlan@...too.org>, Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH 1/4] dt-bindings: reset: add generic bit reset controller

On Do, 2025-02-13 at 10:08 +0800, Inochi Amaoto wrote:
> Some SoCs from Aspeed, Allwinner, Sophgo and Synopsys have
> a simple reset controller by toggling bit. It is a hard time
> for each device to add its own compatible to the driver.
> Since this device share a common design, it is possible to
> add a common device to reduce these unnecessary change.
> 
> Add common binding for these kind generic reset controller.
> 
> Signed-off-by: Inochi Amaoto <inochiama@...il.com>
> ---
>  .../bindings/reset/reset-simple.yaml          | 42 +++++++++++++++++++
>  1 file changed, 42 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/reset-simple.yaml
> 
> diff --git a/Documentation/devicetree/bindings/reset/reset-simple.yaml b/Documentation/devicetree/bindings/reset/reset-simple.yaml
> new file mode 100644
> index 000000000000..77584e23e8e8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/reset-simple.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/reset/reset-simple.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Generic BIT Reset Controller
> +
> +maintainers:
> +  - Inochi Amaoto <inochiama@...il.com>
> +
> +description:
> +  Some reset controller devices uses a simple method to perform
> +  assert/deassert by toggling bit. Some SoCs from Aspeed, Allwinner,
> +  Sophgo and Synopsys have this kind of reset controller instances.

I think some properties should be documented that make reset
controllers "simple" according to this binding.

For example, right now, the reset-simple driver assumes the following:

  - There is a single, contiguous range of 32-bit registers.
  - All bits in each register directly control a reset line.
     - There are no self-deasserting resets.
     - There are no timing requirements.
     - The bits are exclusively resets, nothing else.
  - All bits behave the same, so all reset bits are either
    active-high or all are active-low.
  - The bits can be read back, but the read status may
    be active-low independently from the writes.

> +properties:
> +  compatible:
> +    enum:
> +      - reset-simple-high
> +      - reset-simple-low

I wonder if it would be better to have a single

  compatible:
    const: reset-simple

and a boolean property, e.g.

  active-low:
    type: boolean

like in leds/common.yaml. Also it should be documented clearly what
this means for reads and writes.

> +  reg:
> +    maxItems: 1
> +
> +  "#reset-cells":
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#reset-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    reset-controller@...0000 {
> +        compatible = "reset-simple-high";

The example should probably include a SoC specific compatible?

regards
Philipp