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Message-Id: <20250215155359.321513-3-matthew.gerlach@linux.intel.com>
Date: Sat, 15 Feb 2025 09:53:54 -0600
From: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
To: lpieralisi@...nel.org,
kw@...ux.com,
manivannan.sadhasivam@...aro.org,
robh@...nel.org,
bhelgaas@...gle.com,
krzk+dt@...nel.org,
conor+dt@...nel.org,
dinguyen@...nel.org,
joyce.ooi@...el.com,
linux-pci@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: matthew.gerlach@...era.com,
peter.colberg@...era.com,
Matthew Gerlach <matthew.gerlach@...ux.intel.com>
Subject: [PATCH v7 2/7] dt-bindings: intel: document Agilex PCIe Root Port
The Agilex7f devkit can support PCIe End Points with the appropriate
daughter card.
Signed-off-by: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
---
v7:
- New patch to series.
---
Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
index 2ee0c740eb56..0da5810c9510 100644
--- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
+++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
@@ -20,6 +20,7 @@ properties:
- intel,n5x-socdk
- intel,socfpga-agilex-n6000
- intel,socfpga-agilex-socdk
+ - intel,socfpga-agilex7f-socdk-pcie-root-port
- const: intel,socfpga-agilex
- description: Agilex5 boards
items:
--
2.34.1
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