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Message-Id: <20250215155359.321513-4-matthew.gerlach@linux.intel.com>
Date: Sat, 15 Feb 2025 09:53:55 -0600
From: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
To: lpieralisi@...nel.org,
kw@...ux.com,
manivannan.sadhasivam@...aro.org,
robh@...nel.org,
bhelgaas@...gle.com,
krzk+dt@...nel.org,
conor+dt@...nel.org,
dinguyen@...nel.org,
joyce.ooi@...el.com,
linux-pci@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: matthew.gerlach@...era.com,
peter.colberg@...era.com,
Matthew Gerlach <matthew.gerlach@...ux.intel.com>
Subject: [PATCH v7 3/7] arm64: dts: agilex: Fix fixed-clock schema warnings
All Agilex SoCs have the fixed-clocks defined in socfpga_agilex.dsti,
but the board specific DTS determines which fixed-clocks are actually
used and at what frequency. Fix the schema check warning about fixed-clock
nodes requiring a clock-frequency by disabling all the fixed-clocks in the
DTSI and enabling clocks used by a board in the board specific DTS.
Signed-off-by: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
---
v7:
- Disable fixed-clock in DTSI instead of setting clock-frequency = <0>;
v6:
- New patch to series
---
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 4 ++++
arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts | 1 +
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 1 +
arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts | 1 +
4 files changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index 1235ba5a9865..202b4404577e 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -114,21 +114,25 @@ clocks {
cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
+ status = "disabled";
};
cb_intosc_ls_clk: cb-intosc-ls-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
+ status = "disabled";
};
f2s_free_clk: f2s-free-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
+ status = "disabled";
};
osc1: osc1 {
#clock-cells = <0>;
compatible = "fixed-clock";
+ status = "disabled";
};
qspi_clk: qspi-clk {
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
index d22de06e9839..55f825c5245f 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
@@ -47,6 +47,7 @@ dma-controller@0 {
&osc1 {
clock-frequency = <25000000>;
+ status = "okay";
};
&uart0 {
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
index b31cfa6b802d..3337b19836af 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
@@ -88,6 +88,7 @@ &mmc {
&osc1 {
clock-frequency = <25000000>;
+ status = "okay";
};
&uart0 {
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts
index 0f9020bd0c52..40be9eb41aab 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts
@@ -100,6 +100,7 @@ partition@...000 {
&osc1 {
clock-frequency = <25000000>;
+ status = "okay";
};
&uart0 {
--
2.34.1
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