linux-kernel - Re: [PATCH v2 1/4] KVM: arm64: Allow userspace to change MIDR

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Message-ID: <86jz9psqwd.wl-maz@kernel.org>
Date: Sun, 16 Feb 2025 18:09:22 +0000
From: Marc Zyngier <maz@...nel.org>
To: luoyonggang@...il.com
Cc: Oliver Upton <oliver.upton@...ux.dev>,
	Sebastian Ott <sebott@...hat.com>,
	Joey Gouly <joey.gouly@....com>,
	Suzuki K Poulose <suzuki.poulose@....com>,
	Zenghui Yu <yuzenghui@...wei.com>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>,
	Shameer Kolothum <shameerali.kolothum.thodi@...wei.com>,
	Cornelia Huck <cohuck@...hat.com>,
	Eric Auger <eric.auger@...hat.com>,
	linux-arm-kernel@...ts.infradead.org,
	kvmarm@...ts.linux.dev,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/4] KVM: arm64: Allow userspace to change MIDR_EL1

On Sat, 15 Feb 2025 19:04:20 +0000,
"罗勇刚(Yonggang Luo)" <luoyonggang@...il.com> wrote:
> 
> According to this, the MIDR EL1 is updated properly, but the MIDR for
> aarch32 is not updated, and I don't know how to hook the update for
> MIDR for aarch32

It is the same thing. The AArch32 view is configured the same way as
the AArch64 view, and there is nothing to do at all (that's what
VPIDR_EL2 is all about).

With Oliver's change, I'm correctly getting a different MIDR using a
hacked up kvmtool, see below. I suspect you're not running with the
correct patch applied.

	M.

* kvmtool hack:

diff --git a/arm/aarch64/kvm-cpu.c b/arm/aarch64/kvm-cpu.c
index c8be10b..f8ecbfe 100644
--- a/arm/aarch64/kvm-cpu.c
+++ b/arm/aarch64/kvm-cpu.c
@@ -128,6 +128,18 @@ static void reset_vcpu_aarch64(struct kvm_cpu *vcpu)
 	}
 }
 
+static void reset_vcpu_midr(struct kvm_cpu *vcpu)
+{
+	struct kvm_one_reg reg;
+	u64 midr = 0xbadf00d5;
+
+	reg.id = ARM64_SYS_REG(ARM_CPU_ID, 0);
+	reg.addr = (u64)&midr;
+
+	if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
+		die("KVM_SET_ONE_REG failed (set_midr vcpu%ld", vcpu->cpu_id);
+}
+
 void kvm_cpu__select_features(struct kvm *kvm, struct kvm_vcpu_init *init)
 {
 	if (kvm->cfg.arch.aarch32_guest) {
@@ -181,6 +193,8 @@ void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu)
 			die_perror("sched_setaffinity");
 	}
 
+	reset_vcpu_midr(vcpu);
+
 	if (kvm->cfg.arch.aarch32_guest)
 		return reset_vcpu_aarch32(vcpu);
 	else

* arm64 host:

$ cat /proc/cpuinfo 
processor	: 0
BogoMIPS	: 200.00
Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid
CPU implementer	: 0x41
CPU architecture: 8
CPU variant	: 0x0
CPU part	: 0xd03
CPU revision	: 4

* arm64 guest:

# cat /proc/cpuinfo
processor	: 0
BogoMIPS	: 200.00
Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid
CPU implementer	: 0xba
CPU architecture: 8
CPU variant	: 0xd
CPU part	: 0x00d
CPU revision	: 5

* arm32 guest:

# cat /proc/cpuinfo 
processor	: 0
model name	: ARMv7 Processor rev 5 (v7l)
BogoMIPS	: 200.00
Features	: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm aes pmull sha1 sha2 crc32 
CPU implementer	: 0xba
CPU architecture: 7
CPU variant	: 0xd
CPU part	: 0x00d
CPU revision	: 5

-- 
Without deviation from the norm, progress is not possible.