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Message-ID: <CY8PR11MB713455D3FE3A60DF09F5404D89FA2@CY8PR11MB7134.namprd11.prod.outlook.com>
Date: Tue, 18 Feb 2025 06:03:42 +0000
From: "Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>
To: Yazen Ghannam <yazen.ghannam@....com>, "x86@...nel.org" <x86@...nel.org>,
"Luck, Tony" <tony.luck@...el.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"Smita.KoralahalliChannabasappa@....com"
<Smita.KoralahalliChannabasappa@....com>
Subject: RE: [PATCH v2 10/16] x86/mce: Separate global and per-CPU quirks
> From: Yazen Ghannam <yazen.ghannam@....com>
> [...]
> --- a/arch/x86/kernel/cpu/mce/intel.c
> +++ b/arch/x86/kernel/cpu/mce/intel.c
> @@ -468,8 +468,23 @@ static void intel_imc_init(struct cpuinfo_x86 *c)
> }
> }
>
> +static void intel_apply_quirks(struct cpuinfo_x86 *c) {
> + /*
> + * SDM documents that on family 6 bank 0 should not be written
> + * because it aliases to another special BIOS controlled
> + * register.
> + * But it's not aliased anymore on model 0x1a+
> + * Don't ignore bank 0 completely because there could be a
> + * valid event later, merely don't write CTL0.
Is it better to add the following description here? So that it's clear
we don't apply the quirks for older CPUs.
Older CPUs (prior to family 6) can't reach this point and already return early
due to the check of __mcheck_cpu_ancient_init().
> + */
> + if (c->x86_vfm < INTEL_NEHALEM_EP &&
> this_cpu_read(mce_num_banks))
> + this_cpu_ptr(mce_banks_array)[0].init = false; }
> +
[...]
LGTM. Thanks.
Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@...el.com>
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