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Message-ID: <20250218064003.238868-1-daizhiyuan@phytium.com.cn>
Date: Tue, 18 Feb 2025 14:40:03 +0800
From: Zhiyuan Dai <daizhiyuan@...tium.com.cn>
To: bhelgaas@...gle.com
Cc: linux-pci@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Zhiyuan Dai <daizhiyuan@...tium.com.cn>
Subject: [PATCH] PCI: Update Resizable BAR Capability Register fields

This commit modifies the Resizable BAR Capability Register fields to better
support varying BAR sizes. Additionally, the function `pci_rebar_get_possible_sizes`
has been updated with a more detailed comment to clarify its role in querying
and returning the supported BAR sizes.

For more details, refer to PCI Express庐 Base Specification Revision 5.0, Section 7.8.6.2.

Signed-off-by: Zhiyuan Dai <daizhiyuan@...tium.com.cn>
---
 drivers/pci/pci.c             | 2 +-
 include/uapi/linux/pci_regs.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 661f98c6c63a..03fe5e6e1d72 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3752,7 +3752,7 @@ static int pci_rebar_find_pos(struct pci_dev *pdev, int bar)
  * @bar: BAR to query
  *
  * Get the possible sizes of a resizable BAR as bitmask defined in the spec
- * (bit 0=1MB, bit 19=512GB). Returns 0 if BAR isn't resizable.
+ * (bit 0=1MB, bit 31=128TB). Returns 0 if BAR isn't resizable.
  */
 u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
 {
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 1601c7ed5fab..ce99d4f34ce5 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -1013,7 +1013,7 @@
 
 /* Resizable BARs */
 #define PCI_REBAR_CAP		4	/* capability register */
-#define  PCI_REBAR_CAP_SIZES		0x00FFFFF0  /* supported BAR sizes */
+#define  PCI_REBAR_CAP_SIZES		0xFFFFFFF0  /* supported BAR sizes */
 #define PCI_REBAR_CTRL		8	/* control register */
 #define  PCI_REBAR_CTRL_BAR_IDX		0x00000007  /* BAR index */
 #define  PCI_REBAR_CTRL_NBAR_MASK	0x000000E0  /* # of resizable BARs */
-- 
2.43.0


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