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Message-ID: <20250219160129.GC337534@yaz-khff2.amd.com>
Date: Wed, 19 Feb 2025 11:01:29 -0500
From: Yazen Ghannam <yazen.ghannam@....com>
To: "Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>
Cc: "x86@...nel.org" <x86@...nel.org>, "Luck, Tony" <tony.luck@...el.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
	"Smita.KoralahalliChannabasappa@....com" <Smita.KoralahalliChannabasappa@....com>
Subject: Re: [PATCH v2 08/16] x86/mce: Define BSP-only SMCA init

On Tue, Feb 18, 2025 at 03:33:08AM +0000, Zhuo, Qiuxu wrote:
> > From: Yazen Ghannam <yazen.ghannam@....com>
> > Sent: Friday, February 14, 2025 12:46 AM
> > To: x86@...nel.org; Luck, Tony <tony.luck@...el.com>
> > Cc: linux-kernel@...r.kernel.org; linux-edac@...r.kernel.org;
> > Smita.KoralahalliChannabasappa@....com; Yazen Ghannam
> > <yazen.ghannam@....com>
> > Subject: [PATCH v2 08/16] x86/mce: Define BSP-only SMCA init
> > 
> > Currently on AMD systems, MCA interrupt handler functions are set during
> > CPU init. However, the functions only need to be set once for the whole
> > system.
> > 
> > Assign the handlers only during BSP init. Do so only for SMCA systems to
> > maintain the old behavior for legacy systems.
> 
> Looks like the interrupt handler is still set during each per-CPU online, right?
> What's the benefit/purpose of this patch? Thanks!
> 

This patch is doing the "correct" thing.

>     mce_cpu_online(cpu)
>         mce_threshold_create_device(cpu) {
>             ...
>             mce_threshold_vector = amd_threshold_interrupt;
>             ...
>        }
> 

This part remains for legacy systems. However, I think this is another
place to do more cleanup later.

Thanks,
Yazen

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