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Message-ID: <d7df3b86-c3ff-48af-ad72-428e105976b9@kernel.org>
Date: Wed, 19 Feb 2025 06:42:32 -0600
From: Dinh Nguyen <dinguyen@...nel.org>
To: Thorsten Blum <thorsten.blum@...ux.dev>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [RESEND PATCH] clk: socfpga: clk-pll: Optimize local variables
On 2/19/25 04:42, Thorsten Blum wrote:
> Since readl() returns a u32, the local variables reg and bypass can also
> have the data type u32. Furthermore, divf and divq are derived from reg
> and can also be a u32.
>
> Since do_div() casts the divisor to u32 anyway, changing the data type
> of divq to u32 removes the following Coccinelle/coccicheck warning
> reported by do_div.cocci:
>
> WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead
>
> Compile-tested only.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Signed-off-by: Thorsten Blum <thorsten.blum@...ux.dev>
> ---
> drivers/clk/socfpga/clk-pll.c | 4 ++--
Applied!
Thanks,
Dinh
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