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Message-ID: <Z7XdagRzP6cX5yn4@e133380.arm.com>
Date: Wed, 19 Feb 2025 13:32:26 +0000
From: Dave Martin <Dave.Martin@....com>
To: Babu Moger <babu.moger@....com>
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Subject: Re: [PATCH v11 14/23] x86/resctrl: Implement
resctrl_arch_config_cntr() to assign a counter with ABMC
On Wed, Jan 22, 2025 at 02:20:22PM -0600, Babu Moger wrote:
> The ABMC feature provides an option to the user to assign a hardware
> counter to an RMID, event pair and monitor the bandwidth as long as it
> is assigned. The assigned RMID will be tracked by the hardware until the
> user unassigns it manually.
>
> Implement an architecture-specific handler to assign and unassign the
> counter. Configure counters by writing to the L3_QOS_ABMC_CFG MSR,
> specifying the counter ID, bandwidth source (RMID), and event
> configuration.
>
> The feature details are documented in the APM listed below [1].
> [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming
> Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth
> Monitoring (ABMC).
>
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
> Signed-off-by: Babu Moger <babu.moger@....com>
> ---
[...]
> diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c
> index f2bf5b13465d..ef836bb69b9b 100644
> --- a/arch/x86/kernel/cpu/resctrl/monitor.c
> +++ b/arch/x86/kernel/cpu/resctrl/monitor.c
> @@ -1371,3 +1371,45 @@ void resctrl_arch_mon_event_config_set(void *info)
[...]
> +/*
> + * Send an IPI to the domain to assign the counter to RMID, event pair.
> + */
> +int resctrl_arch_config_cntr(struct rdt_resource *r, struct rdt_mon_domain *d,
> + enum resctrl_event_id evtid, u32 rmid, u32 closid,
> + u32 cntr_id, bool assign)
> +{
> + struct rdt_hw_mon_domain *hw_dom = resctrl_to_arch_mon_dom(d);
> + union l3_qos_abmc_cfg abmc_cfg = { 0 };
> + struct arch_mbm_state *am;
> +
> + abmc_cfg.split.cfg_en = 1;
> + abmc_cfg.split.cntr_en = assign ? 1 : 0;
> + abmc_cfg.split.cntr_id = cntr_id;
> + abmc_cfg.split.bw_src = rmid;
> +
> + /* Update the event configuration from the domain */
> + if (evtid == QOS_L3_MBM_TOTAL_EVENT_ID)
> + abmc_cfg.split.bw_type = hw_dom->mbm_total_cfg;
> + else
> + abmc_cfg.split.bw_type = hw_dom->mbm_local_cfg;
> +
> + smp_call_function_any(&d->hdr.cpu_mask, resctrl_abmc_config_one_amd, &abmc_cfg, 1);
> +
> + /*
> + * Reset the architectural state so that reading of hardware
> + * counter is not considered as an overflow in next update.
> + */
> + am = get_arch_mbm_state(hw_dom, rmid, evtid);
Is this necessary when unassigning the counter, or only when assigning?
> + if (am)
> + memset(am, 0, sizeof(*am));
> +
> + return 0;
> +}
[...]
Cheers
---Dave
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