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Message-ID: <CABymUCPEYJTK=gBHcL291qn2zbotC7_8jA4z18sbSZSjRafSsg@mail.gmail.com>
Date: Thu, 20 Feb 2025 23:48:45 +0800
From: Jun Nie <jun.nie@...aro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Rob Clark <robdclark@...il.com>, Abhinav Kumar <quic_abhinavk@...cinc.com>,
Sean Paul <sean@...rly.run>, Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Jessica Zhang <quic_jesszhan@...cinc.com>, linux-arm-msm@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 12/15] drm/msm/dpu: blend pipes per mixer pairs config
Dmitry Baryshkov <dmitry.baryshkov@...aro.org> 于2025年2月18日周二 03:57写道:
>
> On Mon, Feb 17, 2025 at 10:16:01PM +0800, Jun Nie wrote:
> > Currently, only 2 pipes are used at most for a plane. A stage structure
> > describes the configuration for a mixer pair. So only one stage is needed
> > for current usage cases. The quad-pipe case will be added in future and 2
> > stages are used in the case. So extend the stage to an array with array size
> > STAGES_PER_PLANE and blend pipes per mixer pair with configuration in the
> > stage structure.
> >
> > Signed-off-by: Jun Nie <jun.nie@...aro.org>
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 45 +++++++++++++++++++----------
> > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 +
> > 2 files changed, 30 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > index 81474823e6799132db71c9712046d359e3535d90..50acaf25a3ffcc94354faaa816fe74566784844c 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > @@ -401,7 +401,7 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc,
> > struct dpu_hw_stage_cfg *stage_cfg
> > )
> > {
> > - uint32_t lm_idx;
> > + uint32_t lm_idx, lm_in_pair;
> > enum dpu_sspp sspp_idx;
> > struct drm_plane_state *state;
> >
> > @@ -426,7 +426,8 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc,
> > stage_cfg->multirect_index[stage][stage_idx] = pipe->multirect_index;
> >
> > /* blend config update */
> > - for (lm_idx = 0; lm_idx < num_mixers; lm_idx++)
> > + lm_in_pair = num_mixers > 1 ? 2 : 1;
> > + for (lm_idx = 0; lm_idx < lm_in_pair; lm_idx++)
> > mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl, sspp_idx);
>
> I almost missed this. Why is this necessary?
It is protective code. In case there is only 1 LM, we should not
iterate 2 LM in a stage.
>
> > }
> >
>
> [...]
>
> > @@ -535,8 +543,13 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc)
> > mixer[i].mixer_op_mode,
> > ctl->idx - CTL_0);
> >
> > + /*
> > + * call dpu_hw_ctl_setup_blendstage() to blend layers per stage cfg.
> > + * There are 4 mixers at most. The first 2 are for the left half, and
> > + * the later 2 are for the right half.
> > + */
>
> The comment is invalid until you introduce quad pipe, currently there
> are 2 mixers at most. However you can just say something like 'stage
> data is shared between PIPES_PER_STAGE pipes'.
Accepted.
>
> > ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx,
> > - &stage_cfg);
> > + &stage_cfg[i / PIPES_PER_STAGE]);
> > }
> > }
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> > index 5f010d36672cc6440c69779908b315aab285eaf0..64e220987be5682f26d02074505c5474a547a814 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> > @@ -34,6 +34,7 @@
> > #define DPU_MAX_PLANES 4
> > #endif
> >
> > +#define STAGES_PER_PLANE 2
> > #define PIPES_PER_PLANE 2
> > #define PIPES_PER_STAGE 2
> > #ifndef DPU_MAX_DE_CURVES
> >
> > --
> > 2.34.1
> >
>
> --
> With best wishes
> Dmitry
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