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Message-ID: <CAHk-=wj42Dks1vknzKKBbXUMCrs-iuLZHq=0z3P0AN9TrXNP+A@mail.gmail.com>
Date: Thu, 20 Feb 2025 09:59:29 -0800
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Richard Henderson <richard.henderson@...aro.org>
Cc: "Maciej W. Rozycki" <macro@...am.me.uk>, Ivan Kokshaysky <ink@...een.parts>,
Matt Turner <mattst88@...il.com>, Arnd Bergmann <arnd@...db.de>,
John Paul Adrian Glaubitz <glaubitz@...sik.fu-berlin.de>, Magnus Lindholm <linmag7@...il.com>,
"Paul E. McKenney" <paulmck@...nel.org>, Al Viro <viro@...iv.linux.org.uk>,
linux-alpha@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] Alpha: Emulate unaligned LDx_L/STx_C for data consistency
On Thu, 20 Feb 2025 at 09:54, Richard Henderson
<richard.henderson@...aro.org> wrote:
>
> Crucially, when emulating non-aligned, you should not strive to make it atomic. No other
> architecture promises atomic non-aligned stores, so why should you do that here?
I'm not disagreeing with the "it doesn't necessarily have to be
atomic", but I will point out that x86 does indeed promise atomic
non-aligned accesses.
It will actually lock both cachelines when straddling a cacheline.
It's slow, it's horrendous, and people are trying to get away from it
(google "split lock"), but it is actually architecturally supported.
Linus
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