linux-kernel - Re: [PATCH] Alpha: Emulate unaligned LDx_L/STx

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Message-ID: <dfb14748-c5b8-4a50-990b-d61765a6a75c@linaro.org>
Date: Thu, 20 Feb 2025 10:12:02 -0800
From: Richard Henderson <richard.henderson@...aro.org>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: "Maciej W. Rozycki" <macro@...am.me.uk>,
 Ivan Kokshaysky <ink@...een.parts>, Matt Turner <mattst88@...il.com>,
 Arnd Bergmann <arnd@...db.de>,
 John Paul Adrian Glaubitz <glaubitz@...sik.fu-berlin.de>,
 Magnus Lindholm <linmag7@...il.com>, "Paul E. McKenney"
 <paulmck@...nel.org>, Al Viro <viro@...iv.linux.org.uk>,
 linux-alpha@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] Alpha: Emulate unaligned LDx_L/STx_C for data consistency

On 2/20/25 09:59, Linus Torvalds wrote:
> On Thu, 20 Feb 2025 at 09:54, Richard Henderson
> <richard.henderson@...aro.org> wrote:
>>
>> Crucially, when emulating non-aligned, you should not strive to make it atomic.  No other
>> architecture promises atomic non-aligned stores, so why should you do that here?
> 
> I'm not disagreeing with the "it doesn't necessarily have to be
> atomic", but I will point out that x86 does indeed promise atomic
> non-aligned accesses.

I should have been more expansive with that statement: I didn't mean "no unaligned 
atomics" (e.g. lock orw), but "unaligned normal stores may be non-atomic" (e.g. movw 
across a cacheline).

My guess about the gcc patches is that it's the latter that wanted emulation here.

r~