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Message-Id: <20250222132627.25818-1-guanwentao@uniontech.com>
Date: Sat, 22 Feb 2025 21:26:27 +0800
From: Wentao Guan <guanwentao@...ontech.com>
To: jkeeping@...usicbrands.com
Cc: andriy.shevchenko@...ux.intel.com,
arnd@...db.de,
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sunilvl@...tanamicro.com
Subject: Re: [PATCH v3] serial: 8250: Fix fifo underflow on flush
Hello John,
It seems strange that call 'dmaengine_terminate_async( **dma->rxchan** );' in
'serial8250_ **tx** _dma_flush' during code review.
I am not a professional reviewer in this module, could you explaim the change?
BRs
Wentao Guan
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