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Message-ID: <068655e7-2ad7-4497-aca7-4100ad478d99@juszkiewicz.com.pl>
Date: Sat, 22 Feb 2025 21:05:10 +0100
From: Marcin Juszkiewicz <marcin@...zkiewicz.com.pl>
To: peter.chen@...tech.com
Cc: arnd@...db.de, catalin.marinas@....com, cix-kernel-upstream@...tech.com,
conor+dt@...nel.org, devicetree@...r.kernel.org, fugang.duan@...tech.com,
krzk+dt@...nel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, robh@...nel.org, will@...nel.org
Subject: Re: [PATCH 6/6] arm64: dts: cix: add initial CIX P1(SKY1) dts support
> diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
> new file mode 100644
> index 000000000000..d98735f782e0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/cix/sky1.dtsi
> @@ -0,0 +1,264 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright 2025 Cix Technology Group Co., Ltd.
> + *
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
[..]
> + arch_timer: timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> + clock-frequency = <1000000000>;
> + interrupt-parent = <&gic>;
> + arm,no-tick-in-suspend;
> + };
This is not Arm v8.0 SoC so where is non-secure EL2 virtual timer?
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