Message-ID: <Z7vY5kHfEGzCCuWW@nchen-desktop>
Date: Mon, 24 Feb 2025 10:26:46 +0800
From: Peter Chen <peter.chen@...tech.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Arnd Bergmann <arnd@...db.de>, Rob Herring <robh@...nel.org>,
	krzk+dt@...nel.org, Conor Dooley <conor+dt@...nel.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	cix-kernel-upstream@...tech.com,
	"Fugang . duan" <fugang.duan@...tech.com>
Subject: Re: [PATCH 6/6] arm64: dts: cix: add initial CIX P1(SKY1) dts support

On 25-02-21 12:42:23, Krzysztof Kozlowski wrote:

Hi Krysztof,

Thanks for your detail reviewing. I am afraid my email client did not
receive your email for comment for this patch, I reply at this one.

>> +#include "sky1.dtsi"
>> +/ {
>> +	model = "Radxa Orion O6";
>> +	compatible = "radxa,orion-o6";

> Never tested.

> It does not look like you tested the DTS against bindings. Please run
> `make dtbs_check W=1` (see
> Documentation/devicetree/bindings/writing-schema.rst or
> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> for instructions).
> Maybe you need to update your dtschema and yamllint. Don't rely on
> distro packages for dtschema and be sure you are using the latest
> released dtschema.

I am sorry for that. I just reviewed device driver patch in recent 3-4 years,
forget doing additional check for dts patch.

> 
> On 20/02/2025 13:30, Peter Chen wrote:
> >>
> >>> +
> >>> +       aliases {
> >>> +               serial2 = &uart2;
> >>> +       };
> >>
> >> Please put the aliases in the .dts file, not the chip specific
> >> .dtsi file, as each board typically wires these up differently.
> >>
> >> Note that the 'serial2' alias names are meant to correspond
> >> to whatever label you find on the board, not the internal
> >> numbering inside of the chip they are wired up to. Usually
> >> these start with 'serial0' for the first one that is enabled.
> >
> > In fact, we would like to alias the SoC UART controller index here,
> > and amba-pl011.c will try to get it, see function pl011_probe_dt_alias.
> > It is initial dtsi file, so I only add console one which needs
> > to align the bootargs passed by UEFI.
> 
> 
> Your "in fact" is not really related to the problem described. If you
> put it in the correct place, drivers will work just as fine.

You also mentioned that in your comments. Yes, indeed the board dts file
could remap physical controller index as different board serial number,
but it is not what we would like to do (at least for CIX platforms).
In our both HW and SW documents, we have fixed our uart usage cases,
for example, UART2 as AP serial ports. UART0-UART1 as uart application,eg
bluetooth. Customer will do their design to follow above rules, and
it avoids each customer writing this alias at their board file.

Meanwhile, fixed uart alias as its physical index is better to
understand SW/HW relationship. Imaging you are debugging one UART
bluetooth use case, your application passes "/dev/ttyAMA0" as its
communication port due to board dts alias, but in board schematic,
it is connects to SoC uart 1, the person to debug may confuse the
different mapping at first.

Also, in kernel device driver, it also uses alias id to its uart
port index, it could better understand device driver hardware
behaviours, esp you may dump hardware register to debug, you could
easy to find related registers if the mapping is the same.

> 
> >
> >>
> >>> +               CPU0: cpu0@0 {
> >>> +                       compatible = "arm,armv8";
> >>> +                       enable-method = "psci";

Will change Label "CPU0" as "cpu0", and name "cpu0" as "cpu"

> >>
> >> This should list the actual identifier of the CPU core, not
> >> just "arm,armv8" which is the generic string used in the
> >> models for emulators that don't try to model a particular
> >> core.
> >
> > Will change big core to 'compatible = "arm,cortex-a720";'
> > and LITTLE core to 'compatible = "arm,cortex-a520";'
> >
> >>
> >>> +       memory@...00000 {
> >>> +               #address-cells = <2>;
> >>> +               #size-cells = <2>;
> >>> +               device_type = "memory";
> >>> +               reg = <0x00000000 0x80000000 0x1 0x00000000>;
> >>> +       };
> >>
> >> The memory size is not part of the SoC either, unless the only
> >> way to use this SoC is with on-chip eDRAM or similar.
> >>
> >> Normally this gets filled by the bootloader based on how
> >> much RAM gets detected.
> >
> > Will move it to dts file.
> >
> >>
> >>> +               linux,cma {
> >>> +                       compatible = "shared-dma-pool";
> >>> +                       reusable;
> >>> +                       size = <0x0 0x28000000>;
> >>> +                       linux,cma-default;
> >>> +               };
> >>
> >> Same here, this is a setting from the firmware, not the
> >> SoC.
> >
> > Will move it to dts file since our firmware has already released,
> > and it needs to support different kernels.
> >
> >>
> >>> +       sky1_fixed_clocks: fixed-clocks {
> >>> +               uartclk: uartclk {
> >>> +                       compatible = "fixed-clock";
> >>> +                       #clock-cells = <0>;
> >>> +                       clock-frequency = <100000000>;
> >>> +                       clock-output-names = "uartclk";
> >>
> >>> +               uart_apb_pclk: uart_apb_pclk {
> >>> +                       compatible = "fixed-clock";
> >>> +                       #clock-cells = <0>;
> >>> +                       clock-frequency = <200000000>;
> >>> +                       clock-output-names = "apb_pclk";
> >>
> >>
> >> Clock names don't need "clk" in them, and there should
> >> be no underscore -- use '-' instead of '_' when separating
> >> strings in DT.
> >
> > Will change to:
> > uart_apb: clock-uart-apb {
> 
> No, instead explain why this is part of SoC - or what are you missing
> here - and use preferred naming.

It is in SoC part, APB clock uses to visit register, and the function
amba_get_enable_pclk at file drivers/amba/bus.c needs it during uart
device probes. It uses common Arm uart pl011 IP, the binding doc
described at: Documentation/devicetree/bindings/serial/pl011.yaml

Since it is the initial dts support patch, I do not want to add
more to avoid reviewing efforts, eg, clock gate, reset, etc.
That's the reason I use fixed clock here to let basic system
work, and boots to console.

> 
> Please use name for all fixed clocks which matches current format
> recommendation: 'clock-<freq>' (see also the pattern in the binding for
> any other options).
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/clock/fixed-clock.yaml?h=v6.11-rc1
> 

Will change to "uart_apb: clock-1000000"

>> +	pmu: pmu {

> Keep some sort of order. See DTS coding style.

I will follow: Documentation/devicetree/bindings/dts-coding-style.rst
to fix coding sytle issue at v2 patch set.

>> +		compatible = "arm,armv8-pmuv3";
>> +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
>> +		interrupt-parent = <&gic>;
>> +		status = "okay";

> Where did you disable it? Why only this has status=okay but other do not?

I will remove this one at v2 patch set.

-- 

Best regards,
Peter

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