linux-kernel - Re: [PATCH iwl-next v5 1/9] net: ethtool: mm: extract stmmac verification logic into common library

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Message-ID: <20250223133947.00002f06@gmail.com>
Date: Sun, 23 Feb 2025 13:39:47 +0800
From: Furong Xu <0x1207@...il.com>
To: Faizal Rahim <faizal.abdul.rahim@...ux.intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@...el.com>, Przemek Kitszel
 <przemyslaw.kitszel@...el.com>, Andrew Lunn <andrew+netdev@...n.ch>, "David
 S . Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Maxime
 Coquelin <mcoquelin.stm32@...il.com>, Alexandre Torgue
 <alexandre.torgue@...s.st.com>, Simon Horman <horms@...nel.org>, Russell
 King <linux@...linux.org.uk>, Alexei Starovoitov <ast@...nel.org>, Daniel
 Borkmann <daniel@...earbox.net>, Jesper Dangaard Brouer <hawk@...nel.org>,
 John Fastabend <john.fastabend@...il.com>, Russell King
 <rmk+kernel@...linux.org.uk>, Vladimir Oltean <vladimir.oltean@....com>,
 Serge Semin <fancer.lancer@...il.com>, Xiaolei Wang
 <xiaolei.wang@...driver.com>, Suraj Jaiswal <quic_jsuraj@...cinc.com>, Kory
 Maincent <kory.maincent@...tlin.com>, Gal Pressman <gal@...dia.com>, Jesper
 Nilsson <jesper.nilsson@...s.com>, Andrew Halaney <ahalaney@...hat.com>,
 Choong Yong Liang <yong.liang.choong@...ux.intel.com>, Kunihiko Hayashi
 <hayashi.kunihiko@...ionext.com>, Vinicius Costa Gomes
 <vinicius.gomes@...el.com>, intel-wired-lan@...ts.osuosl.org,
 netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-stm32@...md-mailman.stormreply.com,
 linux-arm-kernel@...ts.infradead.org, bpf@...r.kernel.org
Subject: Re: [PATCH iwl-next v5 1/9] net: ethtool: mm: extract stmmac
 verification logic into common library

On Wed, 19 Feb 2025 21:53:41 -0500, Faizal Rahim <faizal.abdul.rahim@...ux.intel.com> wrote:

> @@ -1258,23 +1236,8 @@ static int stmmac_set_mm(struct net_device *ndev, struct ethtool_mm_cfg *cfg,
>  	if (err)
>  		return err;
>  
> -	/* Wait for the verification that's currently in progress to finish */
> -	timer_shutdown_sync(&fpe_cfg->verify_timer);
> -
> -	spin_lock_irqsave(&fpe_cfg->lock, flags);
> -
> -	fpe_cfg->verify_enabled = cfg->verify_enabled;
> -	fpe_cfg->pmac_enabled = cfg->pmac_enabled;
> -	fpe_cfg->verify_time = cfg->verify_time;
> -	fpe_cfg->tx_enabled = cfg->tx_enabled;
> -
> -	if (!cfg->verify_enabled)
> -		fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_DISABLED;
> -
> +	ethtool_mmsv_set_mm(&priv->fpe_cfg.mmsv, cfg);
>  	stmmac_fpe_set_add_frag_size(priv, frag_size);
> -	stmmac_fpe_apply(priv);

Well, I would prefer keeping stmmac_fpe_set_add_frag_size() before
ethtool_mmsv_set_mm(), but not after, the VERIFY process should be
triggered after all the parameters are set.

> -
> -	spin_unlock_irqrestore(&fpe_cfg->lock, flags);
>  
>  	return 0;
>  }