lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <ddfb3ab1-bb9f-4fa2-9efc-c831febdafc6@quicinc.com>
Date: Mon, 24 Feb 2025 15:25:02 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>, <andersson@...nel.org>,
        <mturquette@...libre.com>, <sboyd@...nel.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>, <konradybcio@...nel.org>,
        <catalin.marinas@....com>, <will@...nel.org>, <p.zabel@...gutronix.de>,
        <richardcochran@...il.com>, <geert+renesas@...der.be>,
        <dmitry.baryshkov@...aro.org>, <arnd@...db.de>,
        <nfraprado@...labora.com>, <quic_tdas@...cinc.com>,
        <biju.das.jz@...renesas.com>, <elinor.montmasson@...oirfairelinux.com>,
        <ross.burton@....com>, <javier.carrasco@...fvision.net>,
        <quic_anusha@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
        <netdev@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_varada@...cinc.com>
Subject: Re: [PATCH v10 4/6] clk: qcom: Add NSS clock Controller driver for
 IPQ9574



On 2/21/2025 5:19 PM, Konrad Dybcio wrote:
> On 21.02.2025 11:14 AM, Manikanta Mylavarapu wrote:
>> From: Devi Priya <quic_devipriy@...cinc.com>
>>
>> Add Networking Sub System Clock Controller (NSSCC) driver for ipq9574 based
>> devices.
>>
>> Signed-off-by: Devi Priya <quic_devipriy@...cinc.com>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
>> ---
> 
> [...]
> 
>> +static int nss_cc_ipq9574_probe(struct platform_device *pdev)
>> +{
>> +	struct regmap *regmap;
>> +	int ret;
>> +
>> +	ret = devm_pm_runtime_enable(&pdev->dev);
>> +	if (ret)
>> +		return ret;
>> +
>> +	ret = devm_pm_clk_create(&pdev->dev);
>> +	if (ret)
>> +		return ret;
>> +
>> +	ret = pm_clk_add(&pdev->dev, "nsscc");
>> +	if (ret)
>> +		return dev_err_probe(&pdev->dev, ret, "Fail to add AHB clock\n");
>> +
>> +	ret = pm_runtime_resume_and_get(&pdev->dev);
>> +	if (ret)
>> +		return ret;
> 
> if /\ suceeds
> 
>> +
>> +	regmap = qcom_cc_map(pdev, &nss_cc_ipq9574_desc);
>> +	if (IS_ERR(regmap))
>> +		return PTR_ERR(regmap);
> 
> you return here without pm_runtime_put, which doesn't decrease the refcount
> for core to put down the resource
> 
> if (IS_ERR(regmap)) {
> 	pm_runtime_put(&pdev->dev);
> 	return PTR_ERR(regmap);
> }
> 
> instead
> 

Hi Konrad,

Thank you for reviewing the patch.
I will incorporate your suggested change in the next version.

Thanks & Regards,
Manikanta.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ