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Message-ID:
<OS8PR06MB7541D685A626D300AC730A5BF2C32@OS8PR06MB7541.apcprd06.prod.outlook.com>
Date: Tue, 25 Feb 2025 00:41:04 +0000
From: Ryan Chen <ryan_chen@...eedtech.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Michael Turquette
<mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Philipp Zabel
<p.zabel@...gutronix.de>, Joel Stanley <joel@....id.au>, Andrew Jeffery
<andrew@...id.au>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
<krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "linux-aspeed@...ts.ozlabs.org"
<linux-aspeed@...ts.ozlabs.org>, "devicetree@...r.kernel.org"
<devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v9 1/3] dt-binding: clock: ast2700: modify soc0/1 clock
define
> Subject: Re: [PATCH v9 1/3] dt-binding: clock: ast2700: modify soc0/1 clock
> define
>
> On 24/02/2025 10:55, Ryan Chen wrote:
> > -remove redundant SOC0_CLK_UART_DIV13:
> > SOC0_CLK_UART_DIV13 is not use at clk-ast2700.c, the clock source tree
> > is uart clk src -> uart_div_table -> uart clk.
> >
> > -Change SOC0_CLK_HPLL_DIV_AHB to SOC0_CLK_AHBMUX:
> > modify clock tree implement.
> > older CLK_AHB use mpll_div_ahb/hpll_div_ahb to be ahb clock source.
> > mpll->mpll_div_ahb
> > -> clk_ahb
> > hpll->hpll_div_ahb
>
>
> I can barely understand it and from the pieces I got, it does not explain need
> for ABI break.
>
#1. SCU0_CLK_UART_DIV13 is redundant, it does not impact ABI break
#2. Change SOC0_CLK_HPLL_DIV_AHB to SOC0_CLK_AHBMUX
Older implement where `mpll_div_ahb` and `hpll_div_ahb` were **hardcoded dividers** for AHB.
In **the new approach (v8)**, I refactored the clock tree to clock tree.
It should be ABI-safe change
Or you want to keep original SOC0_CLK_HPLL_DIV_AHB define and then add SOC0_CLK_AHBMUX.
To be 1st patch, then 2n patch remove redundant SOC0_CLK_HPLL_DIV_AHB?
>
> Best regards,
> Krzysztof
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