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Message-ID: <t34rurxh5cb7hwzvt6ps3fgw4kh4ddwcieukskxxz5mo3pegst@jkapxm6izq7p>
Date: Wed, 26 Feb 2025 10:29:43 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>,
Bjorn Helgaas <bhelgaas@...gle.com>, Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>, Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, chaitanya chundru <quic_krichai@...cinc.com>,
Konrad Dybcio <konradybcio@...nel.org>, cros-qcom-dts-watchers@...omium.org,
Jingoo Han <jingoohan1@...il.com>, Bartosz Golaszewski <brgl@...ev.pl>, quic_vbadigan@...cnic.com,
amitk@...nel.org, dmitry.baryshkov@...aro.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
jorge.ramirez@....qualcomm.com
Subject: Re: [PATCH v4 09/10] dt-bindings: PCI: qcom,pcie-sc7280: Add
'global' interrupt
On Wed, Feb 26, 2025 at 08:32:42AM +0100, Krzysztof Kozlowski wrote:
> On Tue, Feb 25, 2025 at 03:04:06PM +0530, Krishna Chaitanya Chundru wrote:
> > Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt
> > to the host CPU. This interrupt can be used by the device driver to handle
> > PCIe link specific events such as Link up and Link down, which give the
> > driver a chance to start bus enumeration on its own when link is up and
> > initiate link training if link goes to a bad state. The PCIe driver can
> > still work without this interrupt but it will provide a nice user
> > experience when device gets plugged and removed.
> >
> > Hence, document it in the binding along with the existing MSI interrupts.
> > Global interrupt is parsed as optional in driver, so adding it in bindings
> > will not break the ABI.
> >
> > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
> > ---
> > Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml | 8 +++++---
> > 1 file changed, 5 insertions(+), 3 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml
> > index 76cb9fbfd476..7ae09ba8da60 100644
> > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml
> > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml
> > @@ -54,7 +54,7 @@ properties:
> >
> > interrupts:
> > minItems: 8
> > - maxItems: 8
> > + maxItems: 9
> >
> > interrupt-names:
> > items:
> > @@ -66,6 +66,7 @@ properties:
> > - const: msi5
> > - const: msi6
> > - const: msi7
> > + - const: global
>
> Either context is missing or these are not synced with interrupts.
>
I think the patch context ("properties") is confusing here, but it looks
to me that these are in sync: interrupts is defined to have 8 items, and
interrupt-names is a list of msi0 through msi7.
@Krishna, these two last patches (adding the global interrupt) doesn't
seem strongly connected to the switch patches. So, if Krzysztof agrees
with above assessment, please submit them separately (i.e. a new series,
2 patches, v5).
Regards,
Bjorn
> Best regards,
> Krzysztof
>
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