linux-kernel - [PATCH v2 0/4] Add GPIO interrupt support for Amlogic A4 and A5 SoCs

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Message-Id: <20250226-irqchip-gpio-a4-a5-v2-0-c55b1050cb55@amlogic.com>
Date: Wed, 26 Feb 2025 13:47:51 +0800
From: Xianwei Zhao via B4 Relay <devnull+xianwei.zhao.amlogic.com@...nel.org>
To: Thomas Gleixner <tglx@...utronix.de>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Neil Armstrong <neil.armstrong@...aro.org>, 
 Kevin Hilman <khilman@...libre.com>, Jerome Brunet <jbrunet@...libre.com>, 
 Martin Blumenstingl <martin.blumenstingl@...glemail.com>, 
 Heiner Kallweit <hkallweit1@...il.com>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-arm-kernel@...ts.infradead.org, linux-amlogic@...ts.infradead.org, 
 Xianwei Zhao <xianwei.zhao@...ogic.com>
Subject: [PATCH v2 0/4] Add GPIO interrupt support for Amlogic A4 and A5
 SoCs

This patch adds GPIO interrupt support for Amlogic A4 and A5 SoCs

Signed-off-by: Xianwei Zhao <xianwei.zhao@...ogic.com>
---
Changes in v2:
- Use if/then instead of direct modification minimum value for property 'amlogic,channel-interrupts'.
- Add register offsets to the parameter structure to reduce definition of a function.
- Link to v1: https://lore.kernel.org/r/20250219-irqchip-gpio-a4-a5-v1-0-3c8e44ae42df@amlogic.com

---
Xianwei Zhao (4):
      dt-bindings: interrupt-controller: Add support for Amlogic A4 and A5 SoCs
      irqchip: Add support for Amlogic A4 and A5 SoCs
      arm64: dts: Add gpio_intc node for Amlogic A4 SoCs
      arm64: dts: Add gpio_intc node for Amlogic A5 SoCs

 .../amlogic,meson-gpio-intc.yaml                   | 13 +++++++
 arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi        | 21 +++++++++++
 arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi        | 12 +++++++
 drivers/irqchip/irq-meson-gpio.c                   | 42 +++++++++++++++++++---
 4 files changed, 83 insertions(+), 5 deletions(-)
---
base-commit: 953913df9c3ab6f496c6facd5aa7fc9f2f847ac2
change-id: 20241213-irqchip-gpio-a4-a5-80c50a1456c4

Best regards,
-- 
Xianwei Zhao <xianwei.zhao@...ogic.com>