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Message-ID: <20250227154012.259566-12-c.parant@phytec.fr>
Date: Thu, 27 Feb 2025 16:40:12 +0100
From: Christophe Parant <c.parant@...tec.fr>
To: <devicetree@...r.kernel.org>, <linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
CC: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Maxime Coquelin
<mcoquelin.stm32@...il.com>, Alexandre Torgue <alexandre.torgue@...s.st.com>,
<upstream@...ts.phytec.de>
Subject: [PATCH 11/11] ARM: dts: stm32: phyboard-sargas and phycore: Add optional interfaces
- stm32mp15xx-phycore-som: add NAND device on FMC interface to support
the SoM version equipped with NAND flash instead of eMMC.
- stm32mp15xx-phyboard-sargas: define pinctrl for PWM5, LTDC and DCMI
interfaces used on phyBOARD-Sargas. Those interfaces are not enabled by
default as PHYTEC displays and PHYTEC cameras are enabled and configured
throught device tree overlays.
PWM5 is used for LCD backlight command.
Signed-off-by: Christophe Parant <c.parant@...tec.fr>
---
.../dts/st/stm32mp15xx-phyboard-sargas.dtsi | 23 +++++++++++++++++++
.../boot/dts/st/stm32mp15xx-phycore-som.dtsi | 16 +++++++++++++
2 files changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi
index 729a97f82538..2f351adc5986 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi
@@ -260,3 +260,26 @@ &usbphyc_port0 {
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
};
+
+&timers5 {
+ /* spare dmas for other usage */
+ /delete-property/dmas;
+ /delete-property/dma-names;
+ pwm5: pwm {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pwm5_pins_c>;
+ pinctrl-1 = <&pwm5_sleep_pins_c>;
+ };
+};
+
+<dc {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <<dc_pins_f>;
+ pinctrl-1 = <<dc_sleep_pins_f>;
+};
+
+&dcmi {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&dcmi_pins_d>;
+ pinctrl-1 = <&dcmi_sleep_pins_d>;
+};
diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi
index 0689967b8c56..23db635c39a1 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi
@@ -345,3 +345,19 @@ &sdmmc2 {
st,neg-edge;
status = "disabled";
};
+
+&fmc {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&fmc_pins_a>;
+ pinctrl-1 = <&fmc_sleep_pins_a>;
+ status = "disabled";
+
+ nand-controller@4,0 {
+ nand0: nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ };
+ };
+};
--
2.34.1
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