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Message-ID: <20250228002722.5619-4-kylehendrydev@gmail.com>
Date: Thu, 27 Feb 2025 16:27:17 -0800
From: Kyle Hendry <kylehendrydev@...il.com>
To: Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>,
	Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>,
	Florian Fainelli <florian.fainelli@...adcom.com>,
	Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
	Philipp Zabel <p.zabel@...gutronix.de>
Cc: noltari@...il.com,
	jonas.gorski@...il.com,
	Kyle Hendry <kylehendrydev@...il.com>,
	netdev@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH v3 3/3] dt-bindings: net: phy: add BCM63268 GPHY

Add YAML bindings for BCM63268 internal GPHY

Signed-off-by: Kyle Hendry <kylehendrydev@...il.com>
---
 .../bindings/net/brcm,bcm63268-gphy.yaml      | 51 +++++++++++++++++++
 1 file changed, 51 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,bcm63268-gphy.yaml

diff --git a/Documentation/devicetree/bindings/net/brcm,bcm63268-gphy.yaml b/Documentation/devicetree/bindings/net/brcm,bcm63268-gphy.yaml
new file mode 100644
index 000000000000..415f5c03c1a8
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,bcm63268-gphy.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/brcm,bcm63268-gphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM63268 GPHY
+
+description: Broadcom's internal gigabit ethernet PHY on BCM63268 SoC
+
+maintainers:
+  - TBD
+
+allOf:
+  - $ref: ethernet-phy.yaml#
+
+properties:
+  compatible:
+    const: ethernet-phy-id0362.5f50
+
+  reg:
+    maxItems: 1
+
+  brcm,gpio-ctrl:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to the SoC GPIO controller which contains
+      PHY control registers
+
+required:
+  - reg
+  - brcm,gpio-ctrl
+  - resets
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    mdio {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        ethernet-phy@4 {
+            compatible = "ethernet-phy-id0362.5f50";
+            reg = <4>;
+
+            resets = <&periph_rst BCM63268_RST_GPHY>;
+
+            brcm,gpio-ctrl = <&gpio_cntl>;
+        };
+    };
-- 
2.43.0


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