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Message-ID: <1c483978-8e9d-4ba0-8c92-6b4f8c366e2a@quicinc.com>
Date: Fri, 28 Feb 2025 15:20:27 +0800
From: Yuanfang Zhang <quic_yuanfang@...cinc.com>
To: Rob Herring <robh@...nel.org>
CC: Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach
<mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>,
"Alexander
Shishkin" <alexander.shishkin@...ux.intel.com>,
Krzysztof Kozlowski
<krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, <kernel@...cinc.com>,
<linux-kernel@...r.kernel.org>, <coresight@...ts.linaro.org>,
<linux-arm-kernel@...ts.infradead.org>, <kernel@....qualcomm.com>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: Re: [PATCH 1/5] dt-bindings: arm: Add Coresight device Trace NOC
definition
On 2/22/2025 7:53 AM, Rob Herring wrote:
> On Fri, Feb 21, 2025 at 03:40:28PM +0800, Yuanfang Zhang wrote:
>> Adds new coresight-tnoc.yaml file describing the bindings required
>> to define Trace NOC in the device trees.
>>
>> Signed-off-by: Yuanfang Zhang <quic_yuanfang@...cinc.com>
>> ---
>> .../bindings/arm/qcom,coresight-tnoc.yaml | 107 +++++++++++++++++++++
>> 1 file changed, 107 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..b8c1aaf014fb483fd960ec55d1193fb3f66136d2
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
>> @@ -0,0 +1,107 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Ttrace NOC(Network On Chip)
>> +
>> +maintainers:
>> + - yuanfang Zhang <quic_yuanfang@...cinc.com>
>> +
>> +description:
>> + The Trace NoC is an integration hierarchy which is a replacement of Dragonlink tile configuration.
>> + It brings together debug component like TPDA, funnel and interconnect Trace Noc which collects trace
>> + from subsystems and transfers to QDSS sink.
>> +
>> + It sits in the different subsystem of SOC and aggregates the trace and transports it to Aggregation TNoC
>> + or to QDSS trace sink eventually. Trace NoC embeds bridges for all the interfaces(APB, ATB, QPMDA & NTS).
>> +
>> + Trace NoC can take inputs from different trace sources i.e. ATB, QPMDA.
>
> Wrap lines at 80 char. And you need '>' to preserve paragraphs.
how to use '>' to preserve paragraphs? i don't find it on other yaml, could you share one example?
>
>> +
>> +# Need a custom select here or 'arm,primecell' will match on lots of nodes
>> +select:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - qcom,coresight-tnoc
>> + required:
>> + - compatible
>> +
>> +properties:
>> + $nodename:
>> + pattern: "^tn(@[0-9a-f]+)$"
>
> blank line
Done in V2.
>
>> + compatible:
>> + items:
>> + - const: qcom,coresight-tnoc
>> + - const: arm,primecell
>> +
>> + reg:
>> + minItems: 1
>> + maxItems: 2
>
> Need to describe what each entry is.
Update in V2.
>
>> +
>> + clocks:
>> + maxItems: 1
>> +
>> + clock-names:
>> + items:
>> + - const: apb_pclk
>> +
>> + in-ports:
>> + description: |
>
> Don't need '|'
Done in V2.
>
>> + Input connections from subsystem to TNoC
>> + $ref: /schemas/graph.yaml#/properties/ports
>
> You have to define the 'port' nodes.
Done in V2.
>
>> +
>> + out-ports:
>> + description: |
>> + Output connections from the TNoC to Aggreg TNoC or to legacy CoreSight trace bus.
>> + $ref: /schemas/graph.yaml#/properties/ports
>> +
>> + properties:
>> + port:
>> + description: |
>> + Output connections from the TNoC to Aggreg TNoC or to legacy CoreSight trace bus.
>
> 'connections' sounds like more than 1, but you only have 1 port.
>
> Wrap at 80 char.
Done in V2.
>
>> + $ref: /schemas/graph.yaml#/properties/port
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - clocks
>> + - clock-names
>> + - in-ports
>> + - out-ports
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + tn@...ab000 {
>> + compatible = "qcom,coresight-tnoc", "arm,primecell";
>> + reg = <0x0 0x109ab000 0x0 0x4200>;
>> +
>> + clocks = <&aoss_qmp>;
>> + clock-names = "apb_pclk";
>> +
>> + in-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + tn_ag_in_tpdm_gcc: endpoint {
>> + remote-endpoint = <&tpdm_gcc_out_tn_ag>;
>> + };
>> + };
>> + };
>> +
>> + out-ports {
>> + port {
>> + tn_ag_out_funnel_in1: endpoint {
>> + remote-endpoint = <&funnel_in1_in_tn_ag>;
>> + };
>> + };
>> + };
>> + };
>> +...
>>
>> --
>> 2.34.1
>>
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