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Message-ID: <a79884b1-660a-4e17-9a10-f22652e4683b@ti.com>
Date: Fri, 28 Feb 2025 13:47:33 +0530
From: Yemike Abhilash Chandra <y-abhilashchandra@...com>
To: Changhuang Liang <changhuang.liang@...rfivetech.com>,
        Jai Luthra
	<jai.luthra@...ux.dev>,
        Krzysztof Kozlowski <krzk@...nel.org>
CC: "linux-media@...r.kernel.org" <linux-media@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "mripard@...nel.org" <mripard@...nel.org>,
        "mchehab@...nel.org"
	<mchehab@...nel.org>,
        "robh@...nel.org" <robh@...nel.org>,
        "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
        "conor+dt@...nel.org"
	<conor+dt@...nel.org>,
        "devarsht@...com" <devarsht@...com>,
        "vaishnav.a@...com" <vaishnav.a@...com>,
        "r-donadkar@...com"
	<r-donadkar@...com>,
        "u-kumar1@...com" <u-kumar1@...com>
Subject: Re: 回复: [PATCH v4 1/2] dt-bindings: media: cdns,csi2rx.yaml: Add optional interrupts for cdns-csi2rx

Hello Krzysztof, Jai and Changhuang

Thank you for the quick confirmation.

On 28/02/25 13:43, Changhuang Liang wrote:
> Hi, Jai
> 
>> Hi Krzysztof,
>>
>> On Fri, Feb 28, 2025 at 08:34:22AM +0100, Krzysztof Kozlowski wrote:
>>> On Thu, Feb 27, 2025 at 01:59:19PM +0530, Yemike Abhilash Chandra
>> wrote:
>>>> diff --git
>>>> a/Documentation/devicetree/bindings/media/cdns,csi2rx.yaml
>>>> b/Documentation/devicetree/bindings/media/cdns,csi2rx.yaml
>>>> index 2008a47c0580..054ed4b94312 100644
>>>> --- a/Documentation/devicetree/bindings/media/cdns,csi2rx.yaml
>>>> +++ b/Documentation/devicetree/bindings/media/cdns,csi2rx.yaml
>>>> @@ -24,6 +24,16 @@ properties:
>>>>     reg:
>>>>       maxItems: 1
>>>>
>>>> +  interrupts:
>>>> +    minItems: 1
>>>> +    maxItems: 2
>>>> +
>>>> +  interrupt-names:
>>>> +    minItems: 1
>>>> +    items:
>>>> +      - const: error_irq
>>>> +      - const: irq
>>>
>>> And how is this second interrupt in existing integrations?
>>>
>>
>> TI SoCs integrate both of these if I understood the TRM correctly.
> 
> StarFive JH7110 SoC also integrates both of these too.

If that is the case, I will send the next version with both the
interrupts set as non-optional.

Thanks and Regards
Yemike Abhilash Chandra

> 
> Best Regards,
> Changhuang

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