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Message-ID: <20250303094022.GA13345@e133081.arm.com>
Date: Mon, 3 Mar 2025 09:40:34 +0000
From: Mikołaj Lenczewski <miko.lenczewski@....com>
To: Yang Shi <yang@...amperecomputing.com>
Cc: ryan.roberts@....com, suzuki.poulose@....com, catalin.marinas@....com,
will@...nel.org, joro@...tes.org, jean-philippe@...aro.org,
mark.rutland@....com, joey.gouly@....com, oliver.upton@...ux.dev,
james.morse@....com, broonie@...nel.org, maz@...nel.org,
david@...hat.com, akpm@...ux-foundation.org, jgg@...pe.ca,
nicolinc@...dia.com, mshavit@...gle.com, jsnitsel@...hat.com,
smostafa@...gle.com, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, iommu@...ts.linux.dev
Subject: Re: [PATCH v2 1/4] arm64: Add BBM Level 2 cpu feature
On Fri, Feb 28, 2025 at 06:45:38PM -0800, Yang Shi wrote:
>
>
>
> On 2/28/25 5:29 PM, Yang Shi wrote:
> >
> >
> >
> > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> > > index 940343beb3d4..baae6d458996 100644
> > > --- a/arch/arm64/Kconfig
> > > +++ b/arch/arm64/Kconfig
> > > @@ -2057,6 +2057,17 @@ config ARM64_TLB_RANGE
> > > The feature introduces new assembly instructions, and they were
> > > support when binutils >= 2.30.
> > > +config ARM64_ENABLE_BBML2_NOABORT
> > > + bool "Enable support for Break-Before-Make Level 2 detection
> > > and usage"
> > > + default y
> > > + help
> > > + FEAT_BBM provides detection of support levels for
> > > break-before-make
> > > + sequences. If BBM level 2 is supported, some TLB maintenance
> > > requirements
> > > + can be relaxed to improve performance. We additonally require the
> > > + property that the implementation cannot ever raise TLB
> > > Conflict Aborts.
> > > + Selecting N causes the kernel to fallback to BBM level 0
> > > behaviour
> > > + even if the system supports BBM level 2.
> > > +
> > > endmenu # "ARMv8.4 architectural features"
> > > menu "ARMv8.5 architectural features"
> > > diff --git a/arch/arm64/include/asm/cpucaps.h
> > > b/arch/arm64/include/asm/cpucaps.h
> > > index 0b5ca6e0eb09..2d6db33d4e45 100644
> > > --- a/arch/arm64/include/asm/cpucaps.h
> > > +++ b/arch/arm64/include/asm/cpucaps.h
> > > @@ -23,6 +23,8 @@ cpucap_is_possible(const unsigned int cap)
> > > return IS_ENABLED(CONFIG_ARM64_PAN);
> > > case ARM64_HAS_EPAN:
> > > return IS_ENABLED(CONFIG_ARM64_EPAN);
> > > + case ARM64_HAS_BBML2_NOABORT:
> > > + return IS_ENABLED(CONFIG_ARM64_BBML2_NOABORT);
> > > case ARM64_SVE:
> > > return IS_ENABLED(CONFIG_ARM64_SVE);
> > > case ARM64_SME:
> > > diff --git a/arch/arm64/include/asm/cpufeature.h
> > > b/arch/arm64/include/asm/cpufeature.h
> > > index e0e4478f5fb5..108ef3fbbc00 100644
> > > --- a/arch/arm64/include/asm/cpufeature.h
> > > +++ b/arch/arm64/include/asm/cpufeature.h
> > > @@ -866,6 +866,11 @@ static __always_inline bool
> > > system_supports_mpam_hcr(void)
> > > return alternative_has_cap_unlikely(ARM64_MPAM_HCR);
> > > }
> > > +static inline bool system_supports_bbml2_noabort(void)
> > > +{
> > > + return alternative_has_cap_unlikely(ARM64_HAS_BBML2_NOABORT);
> > > +}
> >
> > Hi Miko,
> >
> > I added AmpereOne mdir on top of this patch. I can see BBML2 feature is
> > detected via dmesg. But system_supports_bbml2_noabort() returns false
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