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Message-ID: <CAMuHMdWHpSiVzTeGKZ6tQiHp=6qdzeS6yc9inhQENwVEcSt=eQ@mail.gmail.com>
Date: Thu, 6 Mar 2025 15:43:12 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 2/2] clk: renesas: rzv2h-cpg: Add macro for defining
static dividers
Hi Prabhakar,
On Fri, 28 Feb 2025 at 21:27, Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Unlike dynamic dividers, static dividers do not have a monitor bit.
> Introduce the `DEF_CSDIV()` macro for defining static dividers, ensuring
> consistency with existing dynamic divider macros.
>
> Additionally, introduce the `CSDIV_NO_MON` macro to indicate the absence
> of a monitor bit, allowing the monitoring step to be skipped when
> `mon` is set to `CSDIV_NO_MON`.
>
> Note, `rzv2h_cpg_ddiv_clk_register()` will be re-used instead of generic
> `clk_hw_register_divider_table()` for registering satic dividers
> as some of the static dividers require RMW operations.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Thanks for your patch!
I understand this is in preparation of adding GBETH/XSPI clocks, and
thus related to "[PATCH 2/4] clk: renesas: rzv2h-cpg: Add support for
static dividers"[1]?
> --- a/drivers/clk/renesas/rzv2h-cpg.h
> +++ b/drivers/clk/renesas/rzv2h-cpg.h
> @@ -25,6 +25,14 @@ struct ddiv {
> unsigned int monbit:5;
> };
>
> +/*
> + * On RZ/V2H(P), the dynamic divider clock supports up to 19 monitor bits,
> + * while on RZ/G3E, it supports up to 16 monitor bits. Use the maximum value
> + * `0x1f` to indicate that monitor bits are not supported for static divider
> + * clocks.
> + */
> +#define CSDIV_NO_MON (0x1f)
> +
> #define DDIV_PACK(_offset, _shift, _width, _monbit) \
> ((struct ddiv){ \
> .offset = _offset, \
> @@ -130,6 +138,8 @@ enum clk_types {
> .parent = _parent, \
> .dtable = _dtable, \
> .flag = CLK_DIVIDER_HIWORD_MASK)
> +#define DEF_CSDIV(_name, _id, _parent, _ddiv_packed, _dtable) \
> + DEF_DDIV(_name, _id, _parent, _ddiv_packed, _dtable)
> #define DEF_SMUX(_name, _id, _smux_packed, _parent_names) \
> DEF_TYPE(_name, _id, CLK_TYPE_SMUX, \
> .cfg.smux = _smux_packed, \
However, Biju's patch adds a new composer DEF_SDIV(), and we end up
with not using DEF_CSDIV() at all?
[1] https://lore.kernel.org/20250303110433.76576-3-biju.das.jz@bp.renesas.com
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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