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Message-ID: <20250307214349.GA655306-robh@kernel.org>
Date: Fri, 7 Mar 2025 15:43:49 -0600
From: Rob Herring <robh@...nel.org>
To: Thierry Bultel <thierry.bultel.yh@...renesas.com>
Cc: thierry.bultel@...atsea.fr, linux-renesas-soc@...r.kernel.org,
	geert@...ux-m68k.org, paul.barker.ct@...renesas.com,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 02/13] dt-bindings: clock: Add cpg for the Renesas
 RZ/T2H SoC

On Thu, Mar 06, 2025 at 04:24:36PM +0100, Thierry Bultel wrote:
> Document RZ/T2H (a.k.a r9a09g077) cpg-mssr (Clock Pulse Generator) binding.
> 
> Signed-off-by: Thierry Bultel <thierry.bultel.yh@...renesas.com>
> ---
> Changes v3->v4:
>   - Handle maxItems and clocks names properly in schema. 
> ---
>  .../bindings/clock/renesas,cpg-mssr.yaml      | 56 +++++++++++++------
>  .../clock/renesas,r9a09g077-cpg-mssr.h        | 49 ++++++++++++++++
>  2 files changed, 89 insertions(+), 16 deletions(-)
>  create mode 100644 include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml
> index 77ce3615c65a..acbb555a064e 100644
> --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml
> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml
> @@ -52,9 +52,10 @@ properties:
>        - renesas,r8a779f0-cpg-mssr # R-Car S4-8
>        - renesas,r8a779g0-cpg-mssr # R-Car V4H
>        - renesas,r8a779h0-cpg-mssr # R-Car V4M
> +      - renesas,r9a09g077-cpg-mssr # RZ/T2H
>  
>    reg:
> -    maxItems: 1

Keep constraints at the top-level:

minItems: 1
maxItems: 2

> +    description: Registers base address

Don't need generic descriptions of common properties.

>  
>    clocks:
>      minItems: 1
> @@ -63,11 +64,6 @@ properties:
>    clock-names:
>      minItems: 1
>      maxItems: 2
> -    items:
> -      enum:
> -        - extal     # All
> -        - extalr    # Most R-Car Gen3 and RZ/G2
> -        - usb_extal # Most R-Car Gen2 and RZ/G1
>  
>    '#clock-cells':
>      description: |
> @@ -92,16 +88,6 @@ properties:
>        the datasheet.
>      const: 1
>  
> -if:
> -  not:
> -    properties:
> -      compatible:
> -        items:
> -          enum:
> -            - renesas,r7s9210-cpg-mssr
> -then:
> -  required:
> -    - '#reset-cells'
>  
>  required:
>    - compatible
> @@ -113,6 +99,44 @@ required:
>  
>  additionalProperties: false
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: renesas,r9a09g077-cpg-mssr
> +    then:
> +      properties:
> +        reg:
> +          minItems: 2
> +          maxItems: 2

With the above, you only need minItems.

> +        clock-names:
> +          items:
> +            - const: extal
> +            - const: loco
> +    else:
> +      properties:
> +        reg:
> +          minItems: 1
> +          maxItems: 1

And only maxItems here.

> +        clock-names:
> +          items:
> +            enum:
> +              - extal     # All
> +              - extalr    # Most R-Car Gen3 and RZ/G2
> +              - usb_extal # Most R-Car Gen2 and RZ/G1
> +
> +  - if:
> +      not:
> +        properties:
> +          compatible:
> +            items:
> +              enum:
> +                - renesas,r7s9210-cpg-mssr
> +    then:
> +      required:
> +        - '#reset-cells'
> +
>  examples:
>    - |
>      cpg: clock-controller@...50000 {

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