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Message-ID: <3e6645a8-6de9-4125-8444-fa1a4f526881@163.com>
Date: Sun, 9 Mar 2025 11:18:21 +0800
From: Hans Zhang <18255117159@....com>
To: Siddharth Vadapalli <s-vadapalli@...com>
Cc: lpieralisi@...nel.org, kw@...ux.com, manivannan.sadhasivam@...aro.org,
 robh@...nel.org, bhelgaas@...gle.com, bwawrzyn@...co.com,
 thomas.richard@...tlin.com, wojciech.jasko-EXT@...tinental-corporation.com,
 linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [v2] PCI: cadence: Add configuration space capability search API



On 2025/3/9 10:38, Siddharth Vadapalli wrote:
> On Sat, Mar 08, 2025 at 09:39:03PM +0800, Hans Zhang wrote:
>> Add configuration space capability search API using struct cdns_pcie*
>> pointer.
>>
>> The offset address of capability or extended capability designed by
>> different SOC design companies may not be the same. Therefore, a flexible
>> public API is required to find the offset address of a capability or
>> extended capability in the configuration space.
>>
>> Signed-off-by: Hans Zhang <18255117159@....com>
>> ---
>> Changes since v1:
>> https://lore.kernel.org/linux-pci/20250123070935.1810110-1-18255117159@163.com
>>
>> - Added calling the new API in PCI-Cadence ep.c.
>> - Add a commit message reason for adding the API.
> 
> In reply to your v1 patch, you have mentioned the following:
> "Our controller driver currently has no plans for upstream and needs to
> wait for notification from the boss."
> at:
> https://lore.kernel.org/linux-pci/fcfd4827-4d9e-4bcd-b1d0-8f9e349a6be7@163.com/
> 
> Since you have posted this patch, does it mean that you will be
> upstreaming your driver as well? If not, we still end up in the same
> situation as earlier where the Upstream Linux has APIs to support a
> Downstream driver.
> 
> Bjorn indicated the above already at:
> https://lore.kernel.org/linux-pci/20250123170831.GA1226684@bhelgaas/
> and you did agree to do so. But this patch has no reference to the
> upstream driver series which shall be making use of the APIs in this
> patch.

Hi Siddharth,


Bjorn:
   If/when you upstream code that needs this interface, include this
   patch as part of the series.  As Siddharth pointed out, we avoid
   merging code that has no upstream users.


Hans: This user is: pcie-cadence-ep.c. I think this is an optimization 
of Cadence common code. I think this is an optimization of Cadence 
common code. Siddharth, what do you think?


Best regards,
Hans



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